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FS23 Scheda tecnica(PDF) 142 Page - NXP Semiconductors

Il numero della parte FS23
Spiegazioni elettronici  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS23 Scheda tecnica(HTML) 142 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
Bit
Symbol
Description
Configure the TIMER2 delay time (apply on rising edge only)
00 TIMER2 delay = 0 us
01 TIMER2 delay = 5 us
10 TIMER2 delay = 10 us
11 TIMER2 delay = 15 us
7 to 8
TIMER2_DLY
POR
Table 120. M_TIMER2_CFG register bit description...continued
22.24 M_TIMER3_CFG
Bit
15
14
13
12
11
10
9
8
Write
-
-
-
-
-
-
-
TIMER3_DLY
Read
0
0
0
0
0
0
0
TIMER3_DLY
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Write
TIMER3_DLY
TIMER3_ON
TIMER3_PER
Read
TIMER3_DLY
TIMER3_ON
TIMER3_PER
Reset
0
0
0
0
0
0
0
0
Table 121. M_TIMER3_CFG register bit allocation
Bit
Symbol
Description
Configure the TIMER3 period
000 TIMER3 period = 10.24 ms
001 TIMER3 period = 20.48 ms
010 TIMER3 period = 51.2 ms
011 TIMER3 period = 102.4 ms
100 TIMER3 period = 204.8 ms
101 TIMER3 period = 512 ms
110 TIMER3 period = 1024 ms
111 TIMER3 period = 2048 ms
0 to 2
TIMER3_PER
POR
Table 122. M_TIMER3_CFG register bit description
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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