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FS23 Scheda tecnica(PDF) 144 Page - NXP Semiconductors

Il numero della parte FS23
Spiegazioni elettronici  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS23 Scheda tecnica(HTML) 144 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
22.25 M_PWM1_CFG
Bit
15
14
13
12
11
10
9
8
Write
-
-
-
PWM1_DLY
PWM1_F
PWM1_DC
Read
0
0
0
PWM1_DLY
PWM1_F
PWM1_DC
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Write
PWM1_DC
Read
PWM1_DC
Reset
0
0
0
0
0
0
0
0
Table 123. M_PWM1_CFG register bit allocation
Bit
Symbol
Description
Configure the PWM1 duty cycle
PWM1 duty cycle = 100 * PWM1_DC / 1000
0 to 9
PWM1_DC
POR
Configure the PWM1 frequency
0 PWM1 frequency = 200 Hz
1 PWM1 frequency = 400 Hz
10
PWM1_F
POR
Configure the PWM1 delay time (applies on both edges)
00 PWM1 delay = 0 us
01 PWM1 delay = 5 us
10 PWM1 delay = 10 us
11 PWM1 delay = 15 us
11 to 12
PWM1_DLY
POR
Table 124. M_PWM1_CFG register bit description
22.26 M_PWM2_CFG
Bit
15
14
13
12
11
10
9
8
Write
-
-
-
PWM2_DLY
PWM2_F
PWM2_DC
Read
0
0
0
PWM2_DLY
PWM2_F
PWM2_DC
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Write
PWM2_DC
Read
PWM2_DC
Reset
0
0
0
0
0
0
0
0
Table 125. M_PWM2_CFG register bit allocation
Bit
Symbol
Description
Configure the PWM2 duty cycle
PWM2 duty cycle = 100 * PWM2_DC / 1000
0 to 9
PWM2_DC
POR
Table 126. M_PWM2_CFG register bit description
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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