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FS23 Scheda tecnica(PDF) 138 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 138 Page - NXP Semiconductors |
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138 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Configure CAN wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 0 to 1 CAN_WUEN POR or Fail-safe state Configure LIN wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 2 to 3 LIN_WUEN POR or Fail-safe state Configure LDT wake-up and interrupt capability 00 No wake-up and no interrupt 01 Wake-up only 10 Interrupt only 11 Wake-up and interrupt 4 to 5 LDT_WUEN POR Table 114. M_WU1_EN register bit description 22.21 M_WU1_FLG Bit 15 14 13 12 11 10 9 8 Write[1] - - - - - - FS_EVT EXT_ RSTB_WU Read 0 0 0 0 0 0 FS_EVT EXT_ RSTB_WU Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write[1] WD_OFL_WU V1_UVLP_WU INT_TO_WU GO2 NORMAL_WU - LDT_WU_I LIN_WU_I CAN_WU_I Read WD_OFL_WU V1_UVLP_WU INT_TO_WU GO2 NORMAL_WU 0 LDT_WU_I LIN_WU_I CAN_WU_I Reset 0 0 0 0 0 0 0 0 Table 115. M_WU1_FLG register bit allocation [1] Write 1 in a flag to clear it. Bit Symbol Description Report CAN wake-up event 0 No wake-up by CAN 1 Wake-up by CAN occurred 0 CAN_WU_I POR or fail-safe or clear on write (write '1) Table 116. M_WU1_FLG register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 138 / 230 |
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