H8SSLASH2214 datasheet(633/936 Pages) RENESAS

633 / 936 page

Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 573 of 872

REJ09B0189-0400

Start

Programming end

Return

Set SWE1 bit in FLMCR1

Wait 1

μs: tSSWE

n = 1

m = 0

Subroutine call

Note: 6. Write Pulse Width

Start of subroutine

Set PSU1 bit in FLMCR1

Enable WDT

Set P1 bit in FLMCR1

Wait 50

μs: tSPSU

Clear P1 bit in FLMCR1

Wait: tSP10, tSP30 or tSP200

Clear PSU1 bit in FLMCR1

Wait 5

μs: tCP

Disable WDT

Wait 5

μs: tCPSU

Subroutine: Write Pulse

Subroutine call

See Note 6 for pulse width

Yes

Wait 4

μs: tSPV

Wait 2

μs: tSPVR

Write Pulse (tSP10)

Set PV1 bit in FLMCR1

Perform H'FF dummy-write to verify address

Read verify data

Write data =

verify data?

≥ n?

Compute additional-programming data

Wait 100

μs: tCSWE

m = 1

128 byte data

verify complete?

m = 0?

Increment

address

Programming failure

Wait 100

μs: tCSWE

Clear SWE1 bit in FLMCR1

≥ 1000?

Reprogram Data

(X')

Verify Data

(V)

Additional-Programming

Data (Y)

Comments

Additional programming executed

Additional programming not executed

Successively write 128-byte data from

reprogram data area in RAM to flash memory

Write Pulse (tSP30 or tSP200)

RAM

Program data storage area

(128 bytes)

Reprogram data storage area

(128 bytes)

Additional program data

storage area (128 bytes)

Store 128 bytes program data in program

data area and reprogram data area

Number of Writes n

998

999

1000

Write Time (tSP30/tSP200) µs

tSP30

tSP200

Original Data

(D)

Verify Data

(V)

Reprogram Data

(X)

Comments

Programming complete.

Programming is incomplete;

reprogramming should be performed.

Reprogram Data Computation Table

—

Left in the erased state.

Additional-Programming Data Computation Table

Transfer additional-programming data

to additional-programming data area

Compute reprogram data

Clear PV1 bit in FLMCR1

Wait 2

μs: tCPV

Transfer reprogram data to reprogram

data area

Successively write 128-byte data

from additional-programming data area

in RAM to flash memory

← n + 1

Note: Use a tSP10 write pulse for additional programming.

Notes: 1. Transfer data in byte units. The lower eight bits of the start

address to which data is written must be H'00 or H'80.

Transfer 128-byte data even when writing fewer than 128 bytes.

In this case, set H'FF in unused addresses.

2. Read verify data in longword form (32 bits).

3. Even for bits to which data is already written, an additional write

should be performed if their verify result is NG.

4. A 128-byte area for storing program data, a 128-byte area for

storing reprogram data, and a 128-byte area for storing additional

program data must be provided in RAM. The reprogram and

additional program data contents are modified as programming

proceeds.

5. A write pulse of tSP30 or tSP200 is applied according to the

progress of the programming operation. See Note 6 for the pulse

widths. When writing of the additional program data is executed,

a tSP10 write pulse should be applied. Reprogram data X' means

reprogram data when the pulse is applied.

Data writes must be performed

in the memory-erased state.

Do not write additional data to

an address to which data is

already written.

Figure 15.14 Program/Program-Verify Flowchart

H8S/2214 Scheda tecnica(PDF) 633 Page - Renesas Technology Corp

H8S/2214 Scheda tecnica(HTML) 633 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL