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H8S/2224 Scheda tecnica(PDF) 360 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 360 Page - Renesas Technology Corp |
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360 / 1071 page ![]() Section 8 DMA Controller (DMAC) Rev. 5.00 Aug 08, 2006 page 274 of 982 REJ09B0054-0500 Forced termination of DMAC Clear DTE bit to 0 Forced termination [1] [1] Clear the DTE bit in DMABCRL to 0. To prevent interrupt generation after forced termination of DMAC operation, clear the DTIE bit to 0 at the same time. Figure 8.35 Example of Procedure for Forcibly Terminating DMAC Operation 8.5.15 Clearing Full Address Mode Figure 8.36 shows the procedure for releasing and initializing a channel designated for full address mode. After full address mode has been cleared, the channel can be set to another transfer mode using the appropriate setting procedure. Clearing full address mode Stop the channel Initialize DMACR Clear FAE bit to 0 Initialization; operation halted [1] [2] [3] [1] Clear both the DTE bit and DTME bit in DMABCRL to 0, or wait until the transfer ends and the DTE bit is cleared to 0, then clear the DTME bit to 0. Also clear the corresponding DTIE bit to 0 at the same time. [2] Clear all bits in DMACRA and DMACRB to 0. [3] Clear the FAE bit in DMABCRH to 0. Figure 8.36 Example of Procedure for Clearing Full Address Mode |
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