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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2224 Scheda tecnica(PDF) 555 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 555 Page - Renesas Technology Corp |
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555 / 1071 page  Section 13 Watchdog Timer (WDT) Rev. 5.00 Aug 08, 2006 page 469 of 982 REJ09B0054-0500 Bit Bit Name Initial Value R/W Description 2 1 0 CKS2 CKS1 CKS0 0 0 0 R/W R/W R/W Clock Select 0 to 2 Selects the clock source to be input to TCNT. The overflow frequency* 3 for φ = 10 MHz is enclosed in parentheses. 000: Clock φ/2 (frequency: 51.2 µs) 001: Clock φ/64 (frequency: 1.6 ms) 010: Clock φ/128 (frequency: 3.2 ms) 011: Clock φ/512 (frequency: 13.2 ms) 100: Clock φ/2048 (frequency: 52.4 ms) 101: Clock φ/8192 (frequency: 209.8 ms) 110: Clock φ/32768 (frequency: 838.8 ms) 111: Clock φ/131072 (frequency: 3.36 s) Notes: 1. Only 0 can be written, for flag clearing. 2. When the OVF flag is polled with the interval timer interrupt disabled, read the OVF bit while it is 1 at least twice. 3. The overflow period is the time from when TCNT starts counting up from H'00 until overflow occurs. |
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