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H8S/2224 Scheda tecnica(PDF) 654 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 654 Page - Renesas Technology Corp

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Section 15 Serial Communication Interface (SCI)
Rev. 5.00 Aug 08, 2006 page 568 of 982
REJ09B0054-0500
Bit
Bit Name
Initial
Value
R/W
Description
3
PER
0
R/(W)*
1
Parity Error
Indicates that a parity error occurred during
reception using parity addition in asynchronous
mode, causing abnormal termination.
[Setting condition]
When a parity error is detected during reception
If a parity error occurs, the receive data is
transferred to RDR but the RDRF flag is not set.
Also, subsequent serial reception cannot be
continued while the PER flag is set to 1. In clocked
synchronous mode, serial transmission cannot be
continued, either.
[Clearing condition]
When 0 is written to PER after reading PER = 1
The PER flag is not affected and retains its
previous state when the RE bit in SCR is cleared to
0.



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