ATtiny261A datasheet(83/292 Pages) ATMEL

83 / 292 page

8197A–AVR–10/09

ATtiny261A/461A/861A

11.10.2

TCCR0B – Timer/Counter0 Control Register B

• Bit 4 – TSM: Timer/Counter Synchronization Mode

Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the

value that is written to the PSR0 bit is kept, hence keeping the Prescaler Reset signal asserted.

This ensures that the Timer/Counter is halted and can be configured without the risk of advanc-

ing during configuration. When the TSM bit is written to zero, the PSR0 bit is cleared by

hardware, and the Timer/Counter start counting.

• Bit 3 – PSR0: Prescaler Reset Timer/Counter0

When this bit is one, the Timer/Counter0 prescaler will be Reset. This bit is normally cleared

immediately by hardware, except if the TSM bit is set.

• Bits 2, 1, 0 – CS02, CS01, CS00: Clock Select0, Bit 2, 1, and 0

The Clock Select0 bits 2, 1, and 0 define the prescaling source of Timer0.

If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the

counter even if the pin is configured as an output. This feature allows software control of the

counting.

11.10.3

TCNT0L – Timer/Counter0 Register Low Byte

The Timer/Counter0 Register Low Byte, TCNT0L, gives direct access, both for read and write

operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT0L Register blocks (dis-

ables) the Compare Match on the following timer clock. Modifying the counter (TCNT0L) while

the counter is running, introduces a risk of missing a Compare Match between TCNT0L and the

OCR0x Registers. In 16-bit mode the TCNT0L register contains the lower part of the 16-bit

Timer/Counter0 Register.

Bit

76543210

0x33 (0x53)

TSM

PSR0

CS02

CS01

TCCR0B

Read/Write

R/W

Initial Value

00000000

Table 11-4.

Clock Select Bit Description

CS02

CS01

CS00

Description

No clock source (Timer/Counter stopped)

001

clkI/O/(No prescaling)

010

clkI/O/8 (From prescaler)

011

clkI/O/64 (From prescaler)

100

clkI/O/256 (From prescaler)

101

clkI/O/1024 (From prescaler)

External clock source on T0 pin. Clock on falling edge.

External clock source on T0 pin. Clock on rising edge.

Bit

76543210

0x32 (0x52)

TCNT0L[7:0]

TCNT0L

Read/Write

R/W

Initial Value

00000000

ATtiny261A Scheda tecnica(PDF) 83 Page - ATMEL Corporation

ATtiny261A Scheda tecnica(HTML) 83 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL