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ATtiny261A Scheda tecnica(PDF) 47 Page - ATMEL Corporation |
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ATtiny261A Scheda tecnica(HTML) 47 Page - ATMEL Corporation |
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47 / 292 page ![]() 47 8197A–AVR–10/09 ATtiny261A/461A/861A The WDP3:0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is enabled. The different prescaling values and their corresponding Timeout Periods are shown in Table 8-3. Notes: 1. If selected, one of the valid settings below 0b1010 will be used. Table 8-3. Watchdog Timer Prescale Select WDP3 WDP2 WDP1 WDP0 Number of WDT Oscillator Cycles Typical Time-out at VCC = 5.0V 0 0 0 0 2K (2048) cycles 16 ms 0 0 0 1 4K (4096) cycles 32 ms 0 0 1 0 8K (8192) cycles 64 ms 0 0 1 1 16K (16384) cycles 0.125 s 0 1 0 0 32K (32764) cycles 0.25 s 0 1 0 1 64K (65536) cycles 0.5 s 0 1 1 0 128K (131072) cycles 1.0 s 0 1 1 1 256K (262144) cycles 2.0 s 1 0 0 0 512K (524288) cycles 4.0 s 1 0 0 1 1024K (1048576) cycles 8.0 s 101 0 Reserved(1) 101 1 110 0 110 1 111 0 111 1 |
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