ATtiny261A datasheet(20/292 Pages) ATMEL

20 / 292 page

8197A–AVR–10/09

ATtiny261A/461A/861A

be used. If a reset occurs while a write operation is in progress, the write operation will be com-

pleted provided that the power supply voltage is sufficient.

5.4

I/O Memory

The I/O space definition of the ATtiny261A/461A/861A is shown in “Register Summary” on page

273.

All I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed using the

LD/LDS/LDD and ST/STS/STD instructions, enabling data transfer between the 32 general pur-

pose working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F

are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of sin-

gle bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set

section for more details. When using the I/O specific commands IN and OUT, the I/O addresses

0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST

instructions, 0x20 must be added to these addresses.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that, the CBI and

SBI instructions will only operate on the specified bit, and can therefore be used on registers

containing such Status Flags. The CBI and SBI instructions work on registers in the address

range 0x00 to 0x1F, only.

The I/O and Peripherals Control Registers are explained in later sections.

5.4.1

General Purpose I/O Registers

The ATtiny261A/461A/861A contains three General Purpose I/O Registers. These registers can

be used for storing any information, and they are particularly useful for storing global variables

and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are

directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.

5.5

5.5.1

EEARH – EEPROM Address Register

• Bits 7:1 – Res: Reserved Bits

These bits are reserved and will always read as zero.

• Bit 0 – EEAR8: EEPROM Address

This is the most significant EEPROM address bit of ATtiny861A. In devices with less EEPROM,

i.e. ATtiny261A/ATtiny461A, this bit is reserved and will always read zero. The initial value of the

EEPROM Address Register (EEAR) is undefined and a proper value must therefore be written

before the EEPROM is accessed.

Bit

765

432

0x1F (0x3F)

–––

–

EEAR8

EEARH

Read/Write

RRR

R/W

Initial Value

X/0

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