ATtiny261A datasheet(36/292 Pages) ATMEL

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8197A–AVR–10/09

ATtiny261A/461A/861A

7.3

Power Reduction Register

The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page 38, pro-

vides a method to stop the clock to individual peripherals to reduce power consumption. The

current state of the peripheral is frozen and the I/O registers can not be read or written.

Resources used by the peripheral when stopping the clock will remain occupied, hence the

peripheral should in most cases be disabled before stopping the clock. Waking up a module,

which is done by clearing the bit in PRR, puts the module in the same state as before shutdown.

Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall

power consumption. In all other sleep modes, the clock is already stopped. See “Supply Current

of I/O modules” on page 193 for examples. In all other sleep modes, the clock is already

stopped.

7.4

Minimizing Power Consumption

There are several issues to consider when trying to minimize the power consumption in an AVR

controlled system. In general, sleep modes should be used as much as possible, and the sleep

mode should be selected so that as few as possible of the device’s functions are operating. All

functions not needed should be disabled. In particular, the following modules may need special

consideration when trying to achieve the lowest possible power consumption.

7.4.1

Analog Comparator

When entering Idle mode, the Analog Comparator should be disabled if not used. When entering

ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep

modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is

set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-

abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,

independent of sleep mode. Refer to “AC – Analog Comparator” on page 135 for details on how

to configure the Analog Comparator.

7.4.2

Analog to Digital Converter

If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-

abled before entering any sleep mode. When the ADC is turned off and on again, the next

conversion will be an extended conversion. Refer to “ADC – Analog to Digital Converter” on

page 140 for details on ADC operation.

7.4.3

Brown-out Detector

If the Brown-out Detector is not needed in the application, this module should be turned off. If the

Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes,

and hence, always consume power. In the deeper sleep modes, this will contribute significantly

to the total current consumption. Refer to “Brown-out Detection” on page 41 for details on how to

configure the Brown-out Detector.

7.4.4

Internal Voltage Reference

The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the

Analog Comparator or the ADC. If these modules are disabled as described in the sections

above, the internal voltage reference will be disabled and it will not be consuming power. When

turned on again, the user must allow the reference to start up before the output is used. If the

reference is kept on in sleep mode, the output can be used immediately. Refer to “Internal Volt-

age Reference” on page 42 for details on the start-up time.

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