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MX25L3233F Scheda tecnica(PDF) 75 Page - Macronix International |
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MX25L3233F Scheda tecnica(HTML) 75 Page - Macronix International |
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75 / 84 page ![]() 75 MX25L3233F P/N: PM2113 Rev. 1.6, March 10, 2017 15. ERASE AND PROGRAMMING PERFORMANCE 16. DATA RETENTION Min. Max. Input Voltage with respect to GND on all power pins, SI, CS# -1.0V 2 VCCmax Input Voltage with respect to GND on SO -1.0V VCC + 1.0V Current -100mA +100mA Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time. 17. LATCH-UP CHARACTERISTICS Parameter Condition Min. Max. Unit Data retention 55˚C 20 years Notes: 1. Typical program and erase time assumes the following conditions: 25°C, 3.3V, and checkerboard pattern. 2. Under worst conditions of 85°C and 2.65V. 3. System-level overhead is the time required to execute the first-bus-cycle sequence for the programming com- mand. Parameter Typ.(1) Max.(2) Unit Write Status Register Cycle Time 40 ms Sector Erase Time (4KB) 25 200 ms Block Erase Time (64KB) 0.25 1 s Block Erase Time (32KB) 0.14 0.6 s Chip Erase Time 10 30 s Byte Program Time (via page program command) 10 50 us Page Program Time 0.33 1.2 ms Erase/Program Cycle 100,000 cycles |
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