MX25L3233F datasheet(46/84 Pages) MCNIX

Il numero della parte	MX25L3233F

Spiegazioni elettronici	3V, 32M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY

PDF	84 Pages

Scroll/Zoom	100%

Produttore elettronici	MCNIX [Macronix International]

Homepage	http://www.macronix.com

Logo

46 / 84 page

MX25L3233F

P/N: PM2113

Rev. 1.6, March 10, 2017

10-21. Deep Power-down (DP)

The Deep Power-down (DP) instruction places the device into a minimum power consumption state, Deep Pow-

er-down mode, in which the quiescent current is reduced from ISB1 to ISB2.

The sequence of issuing DP instruction: CS# goes low→ send DP instruction code→ CS# goes high. The CS#

must go high at the byte boundary (after exactly eighth bits of the instruction code have been latched-in); other-

wise the instruction will not be executed. SIO[3:1] are "don't care".

After CS# goes high there is a delay of tDP before the device transitions from Stand-by mode to Deep Power-

down mode and before the current reduces from ISB1 to ISB2. Once in Deep Power-down mode, all instructions

will be ignored except Release from Deep Power-down (RDP).

The device exits Deep Power-down mode and returns to Stand-by mode if it receives a Release from Deep

Power-down (RDP) instruction, power-cycle, or reset. Please refer to "Figure 28. Release from Deep Power-

down (RDP) Sequence".

Figure 26. Deep Power-down (DP) Sequence (Command B9h)

34567

tDP

Deep Power-down Mode

Stand-by Mode

SCLK

CS#

B9h

Command

MX25L3233F Scheda tecnica(PDF) 46 Page - Macronix International