MX25L3233F datasheet(38/84 Pages) MCNIX

38 / 84 page

MX25L3233F

P/N: PM2113

Rev. 1.6, March 10, 2017

10-15. Sector Erase (SE)

The Sector Erase (SE) instruction is for erasing the data of the chosen sector to be "1". The instruction is used

for any 4K-byte sector. A Write Enable (WREN) instruction must execute to set the Write Enable Latch (WEL) bit

before sending the Sector Erase (SE). Any address of the sector (Please refer to "Table 3. Memory Organiza-

tion" ) is a valid address for Sector Erase (SE) instruction. The CS# must go high exactly at the byte boundary

(the least significant bit of the address has been latched-in); otherwise, the instruction will be rejected and not

executed.

The sequence of issuing SE instruction is: CS# goes low → sending SE instruction code→ 3-byte address on SI

→CS# goes high.

The SIO[3:1] are don't care.

The self-timed Sector Erase Cycle time (tSE) is initiated as soon as Chip Select (CS#) goes high. The Write in

Progress (WIP) bit still can be checked while the Sector Erase cycle is in progress. The WIP sets during the tSE

timing, and clears when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is cleared. If the

sector is protected by BP3~0, the array data will be protected (no change) and the WEL bit still be reset.

Figure 18. Sector Erase (SE) Sequence (Command 20h)

24 Bit Address

345678 9

29 30 31

23 22

2 1 0

MSB

SCLK

CS#

20h

Command

MX25L3233F Scheda tecnica(PDF) 38 Page - Macronix International