MX25L3233F datasheet(40/84 Pages) MCNIX

40 / 84 page

MX25L3233F

P/N: PM2113

Rev. 1.6, March 10, 2017

10-17. Block Erase (BE32K)

The Block Erase (BE32K) instruction is for erasing the data of the chosen block to be "1". The instruction is used

for 32K-byte block erase operation. A Write Enable (WREN) instruction must be executed to set the Write Enable

Latch (WEL) bit before sending the Block Erase (BE32K). Any address of the block (Please refer to "Table 3.

Memory Organization" ) is a valid address for Block Erase (BE32K) instruction. The CS# must go high exactly at

the byte boundary (the least significant bit of address byte has been latched-in); otherwise, the instruction will be

rejected and not executed.

The sequence of issuing BE32K instruction is: CS# goes low → sending BE32K instruction code → 3-byte ad-

dress on SI → CS# goes high.

The SIO[3:1] are don't care.

The self-timed Block Erase Cycle time (tBE32K) is initiated as soon as Chip Select (CS#) goes high. The Write

in Progress (WIP) bit still can be checked while the Sector Erase cycle is in progress. The WIP sets during the

tBE32K timing, and clears 0 when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is

cleared. If the block is protected by BP3~0, the array data will be protected (no change) and the WEL bit still be

reset.

Figure 20. Block Erase 32KB (BE32K) Sequence (Command 52h)

24 Bit Address

345678 9

29 30 31

23 22

MSB

SCLK

CS#

52h

Command

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