MX25L3233F datasheet(43/84 Pages) MCNIX

43 / 84 page

MX25L3233F

P/N: PM2113

Rev. 1.6, March 10, 2017

10-20. 4 x I/O Page Program (4PP)

The Quad Page Program (4PP) instruction is for programming the memory to be "0". A Write Enable (WREN)

instruction must be executed to set the Write Enable Latch (WEL) bit and Quad Enable (QE) bit must be set

to "1" before sending the Quad Page Program (4PP). The Quad Page Programming takes four pins: SIO0,

SIO1, SIO2, and SIO3, which can raise programmer performance and the effectiveness of application of lower

clock less than f4PP. For system with faster clock, the Quad page program cannot provide more performance,

because the required internal page program time is far more than the time data flows in. Therefore, we suggest

that while executing this command (especially during sending data), user can slow the clock speed down to f4PP

below. The other function descriptions are as same as standard page program.

The sequence of issuing 4PP instruction is: CS# goes low→ sending 4PP instruction code→ 3-byte address on

SIO[3:0]→ at least 1-byte on data on SIO[3:0]→ CS# goes high.

If the page is protected by BP3~0, the array data will be protected (no change) and the WEL bit will still be reset.

Figure 23. 4 x I/O Page Program (4PP) Sequence (Command 38h)

A20 A16 A12 A8 A4 A0

A21 A17 A13 A9 A5 A1

A22 A18 A14 A10 A6 A2

A23 A19 A15 A11 A7 A3

3456789

6 ADD cycles

Data

Byte 1

Data

Byte 2

Data

Byte 256

SCLK

CS#

SI/SIO0

SO/SIO1

HOLD#/SIO3

WP#/SIO2

Command

10 11 12 13 14 15 16 17

524 525

…

D4 D0

D5 D1

D6 D2

D7 D3

D4 D0

D5 D1

D6 D2

D7 D3

D4 D0

D5 D1

D6 D2

D7 D3

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