 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
R7FA2L1AB2DFN Scheda tecnica(PDF) 107 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R7FA2L1AB2DFN Scheda tecnica(HTML) 107 Page - Renesas Technology Corp |
|
|
107 / 110 page  Table 3.4 Register description (15 of 15) Peripheral name Dim Dim inc. Dim index Register name Description Address offset Size R/W Reset value Reset mask CTSU — — — CTSUSUCLKB CTSU Sensor Unit Clock Control Register B 0x30 32 R/W 0x00000000 0xFFFFFFFF CTSU — — — CTSUSUCLK2 CTSU Sensor Unit Clock Control Register B 0x30 16 R/W 0x0000 0xFFFF CTSU — — — CTSUSUCLK3 CTSU Sensor Unit Clock Control Register B 0x32 16 R/W 0x0000 0xFFFF CTSU — — — CTSUCFCCNT CTSU CFC Counter Register 0x34 32 R 0x00000000 0xFFFFFFFF CTSU — — — CTSUCFCCNTL CTSU CFC Counter Register 0x34 16 R 0x0000 0xFFFF AGT0-1 — — — AGT AGT Counter Register 0x00 16 R/W 0xFFFF 0xFFFF AGT0-1 — — — AGTCMB AGT Compare Match B Register 0x00 16 R/W 0xFFFF 0xFFFF AGT0-1 — — — AGTCMA AGT Compare Match A Register 0x02 16 R/W 0xFFFF 0xFFFF AGT0-1 — — — AGTCR AGT Control Register 0x08 8 R/W 0x00 0xFF AGT0-1 — — — AGTMR1 AGT Mode Register 1 0x09 8 R/W 0x00 0xFF AGT0-1 — — — AGTMR2 AGT Mode Register 2 0x0A 8 R/W 0x00 0xFF AGT0-1 — — — AGTIOC AGT I/O Control Register 0x0C 8 R/W 0x00 0xFF AGT0-1 — — — AGTISR AGT Event Pin Select Register 0x0D 8 R/W 0x00 0xFF AGT0-1 — — — AGTCMSR AGT Compare Match Function Select Register 0x0E 8 R/W 0x00 0xFF AGT0-1 — — — AGTIOSEL AGT Pin Select Register 0x00F 8 R/W 0x00 0xFF ACMPLP — — — COMPMDR ACMPLP Mode Setting Register 0x00 8 R/W 0x00 0xFF ACMPLP — — — COMPFIR ACMPLP Filter Control Register 0x01 8 R/W 0x00 0xFF ACMPLP — — — COMPOCR ACMPLP Output Control Register 0x02 8 R/W 0x00 0xFF FLCN — — — DFLCTL Data Flash Enable Register 0x0090 8 R/W 0x00 0xFF FLCN — — — TSCDR Temperature Sensor Calibration Data Register 0x0228 16 R 0x00 0x00 FLCN — — — CTSUTRIMA CTSU Trimming Register A 0x03A4 32 R/W 0x00000000 0x00000000 FLCN — — — FLDWAITR Memory Wait Cycle Control Register for Data Flash 0x3FC4 8 R/W 0x00 0xFF FLCN — — — PFBER Prefetch Buffer Enable Register 0x3FC8 8 R/W 0x00 0xFF Note: Peripheral name = Name of peripheral Dim = Number of elements in an array of registers Dim inc. = Address increment between two simultaneous registers of a register array in the address map Dim index = Sub string that replaces the %s placeholder within the register name Register name = Name of register Description = Register description Address offset = Address of the register relative to the base address defined by the peripheral of the register Size = Bit width of the register Reset value = Default reset value of a register Reset mask = Identifies which register bits have a defined reset value RA2L1 Datasheet Appendix 3. I/O Registers R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 Page 107 of 110 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
