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R7FA2L1AB2DFN Scheda tecnica(PDF) 103 Page - Renesas Technology Corp |
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R7FA2L1AB2DFN Scheda tecnica(HTML) 103 Page - Renesas Technology Corp |
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103 / 110 page  Table 3.4 Register description (11 of 15) Peripheral name Dim Dim inc. Dim index Register name Description Address offset Size R/W Reset value Reset mask SCI1-3,9 — — — SISR IIC Status Register 0x0C 8 R 0x00 0xCB SCI1-3,9 — — — SPMR SPI Mode Register 0x0D 8 R/W 0x00 0xFF SCI1-3,9 — — — TDRHL Transmit Data Register 0x0E 16 R/W 0xFFFF 0xFFFF SCI1-3,9 — — — RDRHL Receive Data Register 0x10 16 R 0x0000 0xFFFF SCI1-3,9 — — — MDDR Modulation Duty Register 0x12 8 R/W 0xFF 0xFF SCI1-3,9 — — — DCCR Data Compare Match Control Register 0x13 8 R/W 0x40 0xFF SCI1-3,9 — — — CDR Compare Match Data Register 0x1A 16 R/W 0x0000 0xFFFF SCI1-3,9 — — — SPTR Serial Port Register 0x1C 8 R/W 0x03 0xFF SPI0-1 — — — SPCR SPI Control Register 0x00 8 R/W 0x00 0xFF SPI0-1 — — — SSLP SPI Slave Select Polarity Register 0x01 8 R/W 0x00 0xFF SPI0-1 — — — SPPCR SPI Pin Control Register 0x02 8 R/W 0x00 0xFF SPI0-1 — — — SPSR SPI Status Register 0x03 8 R/W 0x20 0xFF SPI0-1 — — — SPDR SPI Data Register 0x04 32 R/W 0x00000000 0xFFFFFFFF SPI0-1 — — — SPDR_HA SPI Data Register 0x04 16 R/W 0x0000 0xFFFF SPI0-1 — — — SPBR SPI Bit Rate Register 0x0A 8 R/W 0xFF 0xFF SPI0-1 — — — SPDCR SPI Data Control Register 0x0B 8 R/W 0x00 0xFF SPI0-1 — — — SPCKD SPI Clock Delay Register 0x0C 8 R/W 0x00 0xFF SPI0-1 — — — SSLND SPI Slave Select Negation Delay Register 0x0D 8 R/W 0x00 0xFF SPI0-1 — — — SPND SPI Next-Access Delay Register 0x0E 8 R/W 0x00 0xFF SPI0-1 — — — SPCR2 SPI Control Register 2 0x0F 8 R/W 0x00 0xFF SPI0-1 — — — SPCMD0 SPI Command Register 0 0x10 16 R/W 0x070D 0xFFFF CRC — — — CRCCR0 CRC Control Register 0 0x00 8 R/W 0x00 0xFF CRC — — — CRCCR1 CRC Control Register 1 0x01 8 R/W 0x00 0xFF CRC — — — CRCDIR CRC Data Input Register 0x04 32 R/W 0x00000000 0xFFFFFFFF CRC — — — CRCDIR_BY CRC Data Input Register 0x04 8 R/W 0x00 0xFF CRC — — — CRCDOR CRC Data Output Register 0x08 32 R/W 0x00000000 0xFFFFFFFF CRC — — — CRCDOR_HA CRC Data Output Register 0x08 16 R/W 0x0000 0xFFFF CRC — — — CRCDOR_BY CRC Data Output Register 0x08 8 R/W 0x00 0xFF CRC — — — CRCSAR Snoop Address Register 0x0C 16 R/W 0x0000 0xFFFF GPT320-3 — — — GTWP General PWM Timer Write-Protection Register 0x00 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTSTR General PWM Timer Software Start Register 0x04 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTSTP General PWM Timer Software Stop Register 0x08 32 R/W 0xFFFFFFFF 0xFFFFFFFF GPT320-3 — — — GTCLR General PWM Timer Software Clear Register 0x0C 32 W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTSSR General PWM Timer Start Source Select Register 0x10 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTPSR General PWM Timer Stop Source Select Register 0x14 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTCSR General PWM Timer Clear Source Select Register 0x18 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTUPSR General PWM Timer Up Count Source Select Register 0x1C 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTDNSR General PWM Timer Down Count Source Select Register 0x20 32 R/W 0x00000000 0xFFFFFFFF GPT320-3 — — — GTICASR General PWM Timer Input Capture Source Select Register A 0x24 32 R/W 0x00000000 0xFFFFFFFF RA2L1 Datasheet Appendix 3. I/O Registers R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 Page 103 of 110 |
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