AT83SND1CXXX-ROTIL datasheet(98/212 Pages) ATMEL

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4109J–8051–10/06

AT8xC51SND1C

Reset Value = 0000 0000b

Table 81. USBADDR Register

USBADDR (S:C6h) – USB Address Register

Bit

Number

Bit

Mnemonic

Description

7USBE

USB Enable Bit

Set this bit to enable the USB controller.

Clear this bit to disable and reset the USB controller, to disable the USB

transceiver an to disable the USB controllor clock inputs.

6SUSPCLK

Suspend USB Clock Bit

Set to disable the 48 MHz clock input (Resume Detection is still active).

Clear to enable the 48 MHz clock input.

SDRMWUP

Send Remote Wake-Up Bit

Set to force an external interrupt on the USB controller for Remote Wake UP

purpose.

An upstream resume is send only if the bit RMWUPE is set, all USB clocks are

enabled AND the USB bus was in SUSPEND state for at least 5 ms. See

UPRSM below.

Cleared by software.

Reserved

The value read from this bit is always 0. Do not set this bit.

3UPRSM

Upstream Resume Bit (read only)

Set by hardware when SDRMWUP has been set and if RMWUPE is enabled.

Cleared by hardware after the upstream resume has been sent.

2RMWUPE

Remote Wake-Up Enable Bit

Set to enabled request an upstream resume signaling to the host.

Clear after the upstream resume has been indicated by RSMINPR.

Note: Do not set this bit if the host has not set the DEVICE_REMOTE_WAKEUP

feature for the device.

1CONFG

Configuration Bit

This bit should be set by the device firmware after a SET_CONFIGURATION

request with a non-zero value has been correctly processed.

It should be cleared by the device firmware when a SET_CONFIGURATION

request with a zero value is received. It is cleared by hardware on hardware

reset or when an USB reset is detected on the bus (SE0 state for at least 32 Full

Speed bit times: typically 2.7

μs).

FADDEN

Function Address Enable Bit

This bit should be set by the device firmware after a successful status phase of a

SET_ADDRESS transaction.

It should not be cleared afterwards by the device firmware. It is cleared by

hardware on hardware reset or when an USB reset is received (see above).

When this bit is cleared, the default function address is used (0).

7654

3210

FEN

UADD6

UADD5

UADD4

UADD3

UADD2

UADD1

UADD0

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