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Motore di ricerca datesheet componenti elettronici |
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AT83SND1CXXX-ROTIL Scheda tecnica(PDF) 13 Page - ATMEL Corporation |
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AT83SND1CXXX-ROTIL Scheda tecnica(HTML) 13 Page - ATMEL Corporation |
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13 / 212 page  13 4109J–8051–10/06 AT8xC51SND1C is the oscillator frequency. Note: 1. The X2 bit reset value depends on the X2B bit in the Hardware Security Byte (see Table 12 on page 24). Using the AT89C51SND1C (Flash Version) the system can boot either in standard or X2 mode depending on the X2B value. Using AT83SND1C (ROM Version) the system always boots in standard mode. X2B bit can be changed to X2 mode later by software. Figure 5-3. Mode Switching Waveforms Note: 1. In order to prevent any incorrect operation while operating in X2 mode, user must be aware that all peripherals using clock frequency as time reference (timers, etc.) will have their time reference divided by 2. For example, a free running timer generating an interrupt every 20 ms will then generate an interrupt every 10 ms. 5.3 PLL 5.3.1 PLL Description The AT8xC51SND1C PLL is used to generate internal high frequency clock (the PLL Clock) syn- chronized with an external low-frequency (the Oscillator Clock). The PLL clock provides the MP3 decoder, the audio interface, and the USB interface clocks. Figure 5-4 shows the internal struc- ture of the PLL. The PFLD block is the Phase Frequency Comparator and Lock Detector. This block makes the comparison between the reference clock coming from the N divider and the reverse clock com- ing from the R divider and generates some pulses on the Up or Down signal depending on the edge position of the reverse clock. The PLLEN bit in PLLCON register is used to enable the clock generation. When the PLL is locked, the bit PLOCK in PLLCON register (see Table 17) is set. The CHP block is the Charge Pump that generates the voltage reference for the VCO by inject- ing or extracting charges from the external filter connected on PFILT pin (see Figure 5-5). Value of the filter components are detailed in the Section “DC Characteristics”. The VCO block is the Voltage Controlled Oscillator controlled by the voltage V ref produced by the charge pump. It generates a square wave signal: the PLL clock. X1 ÷ 2 X1 Clock X2 Bit X2 Mode (1) STD Mode STD Mode |
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