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AT83SND1CXXX-ROTIL Scheda tecnica(PDF) 105 Page - ATMEL Corporation

Il numero della parte AT83SND1CXXX-ROTIL
Spiegazioni elettronici  Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
PDF  212 Pages
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Produttore elettronici  ATMEL [ATMEL Corporation]
Homepage  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND1CXXX-ROTIL Scheda tecnica(HTML) 105 Page - ATMEL Corporation

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105
4109J–8051–10/06
AT8xC51SND1C
Reset Value = 0000 0000b
Table 90. UEPDATX Register
UEPDATX (S:CFh) – USB Endpoint X FIFO Data Register (X = EPNUM set in UEPNUM)
Reset Value = XXh
Table 91. UBYCTX Register
UBYCTX (S:E2h) – USB Endpoint X Byte Count Register (X = EPNUM set in UEPNUM)
Bit
Number
Bit
Mnemonic
Description
7 - 3
-
Reserved
The value read from these bits is always 0. Do not set these bits.
2EP2INT
Endpoint 2 Interrupt Flag
This bit is set by hardware when an endpoint interrupt source has been detected
on the endpoint 2. The endpoint interrupt sources are in the UEPSTAX register
and can be: TXCMP, RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP2IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are
cleared.
1EP1INT
Endpoint 1 Interrupt Flag
This bit is set by hardware when an endpoint interrupt source has been detected
on the endpoint 1. The endpoint interrupt sources are in the UEPSTAX register
and can be: TXCMP, RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP1IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are
cleared.
0EP0INT
Endpoint 0 Interrupt Flag
This bit is set by hardware when an endpoint interrupt source has been detected
on the endpoint 0. The endpoint interrupt sources are in the UEPSTAX register
and can be: TXCMP, RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP0IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are
cleared.
7654
3210
FDAT7
FDAT6
FDAT5
FDAT4
FDAT3
FDAT2
FDAT1
FDAT0
Bit
Number
Bit
Mnemonic
Description
7 - 0
FDAT7:0
Endpoint X FIFO Data
Data Byte to be written to FIFO or data Byte to be read from the FIFO, for the
Endpoint X (see EPNUM).
7654
3210
-
BYCT6
BYCT5
BYCT4
BYCT3
BYCT2
BYCT1
BYCT0



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