AT83SND1CXXX-ROTIL datasheet(118/212 Pages) ATMEL

118 / 212 page

118

4109J–8051–10/06

AT8xC51SND1C

Figure 15-15. Data Controller Configuration Flows

15.6.3

Data Transmitter

15.6.3.1

Configuration

For transmitting data to the card user must first configure the data controller in transmission

mode by setting the DATDIR bit in MMCON1 register.

Figure 15-16 summarizes the data stream transmission flows in both polling and interrupt modes

while Figure 15-17 summarizes the data block transmission flows in both polling and interrupt

modes, these flows assume that block length is greater than 16 data.

15.6.3.2

Data Loading

Data is loaded in the FIFO by writing to MMDAT register. Number of data loaded may vary from

1 to 16 Bytes. Then if necessary (more than 16 Bytes to send) user must wait that one FIFO

becomes empty (F1EI or F2EI set) before loading 8 new data.

15.6.3.3

Data Transmission

Transmission is enabled by setting and clearing DATEN bit in MMCON1 register.

Data is transmitted immediately if the response has already been received, or is delayed after

the response reception if its status is correct. In both cases transmission is delayed if a card

sends a busy state on the data line until the end of this busy condition.

According to the MMC specification, the data transfer from the host to the card may not start

sooner than 2 MMC clock periods after the card response was received (formally N

WR parame-

ter). To address all card types, this delay can be programmed using DATD1:0 bits in MMCON2

when DATD1:0 bits are set, by step of 2 MMC clock periods.

15.6.3.4

End of Transmission

The end of a data frame (block or stream) transmission is signalled to you by the EOFI flag in

MMINT register. This flag may generate an MMC interrupt request as detailed in Section "Inter-

rupt", page 122.

In data stream mode, EOFI flag is set, after reception of the End bit. This assumes user has pre-

viously sent the STOP command to the card, which is the only way to stop stream transfer.

In data block mode, EOFI flag is set, after reception of the CRC status token (see Figure 15-7).

2 other flags in MMSTA register: DATFS and CRC16S report a status on the frame sent. DATFS

indicates if the CRC status token format is correct or not, and CRC16S indicates if the card has

found the CRC16 of the block correct or not.

15.6.3.5

Busy Status

As shown in Figure 15-7 the card uses a busy token during a block write operation. This busy

status is reported to you by the CBUSY flag in MMSTA register and by the MCBI flag in MMINT

Data Single Block

Configuration

Data Stream

Configuration

Configure Format

DFMT = 0

Data Multi-Block

Configuration

Configure Format

DFMT = 1

MBLOCK = 1

BLEN3:0 = XXXXb

Configure Format

DFMT = 1

MBLOCK = 0

BLEN3:0 = XXXXb

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