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ADIN1300CCPZ-R7 Scheda tecnica(PDF) 51 Page - Analog Devices |
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ADIN1300CCPZ-R7 Scheda tecnica(HTML) 51 Page - Analog Devices |
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51 / 96 page ![]() Data Sheet ADIN1300 REGISTER SUMMARY analog.com Rev. B | 51 of 96 Table 34. Bit Descriptions for MII_STATUS Bits Bit Name Description Reset Access 15 T_4_SPRT The 100BASE-T4 ability bit always reads as 1'b0 because the PHY does not support 100BASE-T4. 0x0 R 14 FD_100_SPRT The 100BASE-TX full duplex ability bit always reads as 1'b1 because the PHY supports 100BASE-TX full duplex. 0x1 R 13 HD_100_SPRT The 100BASE-TX half duplex ability bit always reads as 1'b1 because the PHY supports 100BASE-TX half duplex. 0x1 R 12 FD_10_SPRT The 10BASE-T full duplex ability bit always reads as 1'b1 because the PHY supports 10BASE-T full duplex. 0x1 R 11 HD_10_SPRT The 10BASE-T half duplex ability bit always reads as 1'b1 because the PHY supports 10BASE-T half duplex. 0x1 R 10 FD_T_2_SPRT The 100BASE-T2 full duplex ability bit always reads as 1'b0 because the PHY does not support 100BASE-T2. 0x0 R 9 HD_T_2_SPRT The 100BASE-T2 half duplex ability bit always reads as 1'b0 because the PHY does not support 100BASE-T2. 0x0 R 8 EXT_STAT_SPRT The extended status support bit always reads as 1'b1, indicating that the PHY provides extended status information in Register 0x000F. 0x1 R 7 UNIDIR_ABLE When zero, the unidirectional ability register bit indicates that the PHY can only transmit data from the media independent interface when it has determined that a valid link has been established. This bit always reads as 1'b0. 0x0 R 6 MF_PREAM_SUP_ABLE Management Frame Preamble Suppression Ability Bit. This always reads as 1'b1 because the PHY accepts management frames with preamble suppressed. 0x1 R 5 AUTONEG_DONE Autonegotiation Complete Bit. 0x0 R 1: autonegotiation process completed. 0: autonegotiation process not completed. 4 REM_FLT_LAT Remote Fault Bit. When this bit goes high, it latches high until it is unlatched by reading. 0x0 R LH 1: remote fault condition detected. 0: no remote fault condition detected. 3 AUTONEG_ABLE Autonegotiation Ability Bit. This bit always reads as 1'b1. 0x1 R 1: PHY is able to perform autonegotiation. 0: PHY is not able to perform autonegotiation. 2 LINK_STAT_LAT Link Status Bit. If the link subsequently drops, this bit latches low until it is unlatched by reading. 0x0 R LL 1: link is up. 0: link is down. 1 JABBER_DET_LAT Jabber Detect Bit. When this bit goes high, it latches high until it is unlatched by reading. 0x0 R LH 1: jabber condition detected. 0: no jabber condition detected. 0 EXT_CAPABLE The extended capability bit always reads as 1'b1 because the PHY provides an extended set of capabili- ties. 0x1 R PHY Identifier 1 Register Address: 0x0002, Reset: 0x0283, Name: PHY_ID_1 This address corresponds to the MII status register specified in Clause 22.2.4.3.1 of IEEE Standard 802.3 and allows 16 bits of the organizationally unique identifier (OUI) to be observed. |
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