 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
ADIN1300CCPZ-R7 Scheda tecnica(PDF) 1 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADIN1300CCPZ-R7 Scheda tecnica(HTML) 1 Page - Analog Devices |
|
|
1 / 96 page  Data Sheet ADIN1300 Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY Rev. B DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► 10BASE-Te/100BASE-TX/1000BASE-T IEEE 802.3 compliant ► MII, RMII, and RGMII MAC interfaces ► 1000BASE-T RGMII latency transmit <68 ns, receive <226 ns ► 100BASE-TX MII latency transmit <52 ns, receive <248 ns ► Programmable RGMII timing delay and drive current ► Supports TSN ► EMC test standards ► IEC 61000-4-5 surge (±4 kV) ► IEC 61000-4-4 electrical fast transient (EFT) (±4 kV) ► IEC 61000-4-2 ESD (±6 kV contact discharge) ► IEC 61000-4-6 conducted immunity (10 V) ► EN55032 radiated and conducted emissions (Class A) ► Unmanaged configuration using multilevel pin strapping ► MDIO/MDC management interface and interrupt pin ► EEE in accordance with IEEE 802.3az ► Start of packet detection for IEEE 1588 time stamp support ► Enhanced link detection ► Voltage mode MDI drivers, eliminates termination resistors ► RJ45 MDI flip capability ► Automatic polarity and pair swap correction ► Cable diagnostics (TDR and signal analysis) ► Frame generator and checker, multiple loopback modes ► Configurable LED ► 25 MHz/125 MHz synchronous clock output ► Jumbo frame support up to 16 kB ► Small package and wide temperature range ► 40-lead, 6 mm × 6 mm LFCSP ► Specified for −40°C to +105°C ambient operation ► Low power consumption ► 330 mW for 1000BASE-T ► 140 mW for 100BASE-TX ► 3.3 V/2.5 V/1.8 V MAC interface VDDIO supply ► Integrated power supply monitoring and POR APPLICATIONS ► Industrial automation ► Process control ► Factory automation ► Robotics/motion control ► Time sensitive networking (TSN) ► Building automation ► Test and measurement ► Industrial internet of things (IoT) GENERAL DESCRIPTION The ADIN1300 is a low power, single port, Gigabit Ethernet trans- ceiver with low latency and power consumption specifications pri- marily designed for industrial Ethernet applications. This design integrates an energy efficient Ethernet (EEE) physi- cal layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and MAC interface and control logic to manage the reset and clock control and pin configuration. The ADIN1300 is available in a 6 mm × 6 mm, 40-lead lead frame chip scale package (LFCSP). The device operates with a minimum of 2 power supplies, 0.9 V and 3.3 V, assuming the use of a 3.3 V MAC interface supply. For maximum flexibility in system level design, a separate VDDIO supply enables the management data input/output (MDIO) and MAC interface supply voltages to be configured independently of the other circuitry on the ADIN1300, allowing operation at 1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1300 is held in hardware reset until each of the supplies has crossed its minimum rising threshold value. Brown-out protection is provided by monitoring the supplies to detect if one or more supply drops below a minimum falling threshold (see Table 19), and holding the device in hardware reset until the power supplies return and satisfy the power-on reset (POR) circuit. The MII management interface (also referred to as MDIO interface) provides a 2-wire serial interface between a host processor or MAC (also known as management station (STA)) and the ADIN1300, allowing access to control and status information in the PHY core management registers. The interface is compatible with both the IEEE 802.3 Standard Clause 22 and Clause 45 management frame structures. The ADIN1300 can support cable lengths up to 150 meters at Gigabit speeds and 180 meters when operating at 100 Mbps or 10 Mbps. Note that throughout this data sheet, multifunction pins, such as XTAL_I/CLK_IN/REF_CLK, are referred to either by the entire pin name or by a single function of the pin, for example, XTAL_I/CLK_IN, when only that function is relevant. Analog Devices is in the process of updating documentation to provide terminology and language that is culturally appropriate. This is a process with a wide scope and will be phased in as quickly as possible. Thank you for your patience. |
Codice articolo simile - ADIN1300CCPZ-R7 |
|
Descrizione simile - ADIN1300CCPZ-R7 |
|
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
