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ADIN1300CCPZ-R7 Scheda tecnica(PDF) 14 Page - Analog Devices |
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ADIN1300CCPZ-R7 Scheda tecnica(HTML) 14 Page - Analog Devices |
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14 / 96 page ![]() Data Sheet ADIN1300 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS analog.com Rev. B | 14 of 96 Figure 10. Pin Configuration Table 13. Pin Function Descriptions Pin No. Mnemonic Supply Domain Description Clock Interface 8 XTAL_O AVDD_3P3 Second Terminal for Crystal Connection. If using a single-ended reference clock on XTAL_I/ CLK_IN/REF_CLK, leave XTAL_O open circuit. 9 XTAL_I/CLK_IN/REF_CLK AVDD_3P3 Input for Crystal (XTAL_I). Single-Ended 25 MHz Reference Clock (CLK_IN). 50 MHz RMII Reference Clock Input in RMII Mode (REF_CLK). Management Interface 22 INT_N/CRS VDDIO Management Interface Interrupt Pin Output (INT_N). Active low output. A low on INT_N indicates an unmasked management interrupt. This pin requires a 1.5 kΩ pull-up resistor to VDDIO. MII Carrier Sense Output (CRS). Indicates the presence of a carrier to MAC. 23 MDC Management Data Clock Input up to 5.5 MHz. 24 MDIO Management Data Open-Drain Input/Output Synchronous to the MDC Clock. This pin requires a 1.5 kΩ pull-up resistor to VDDIO. Reset 7 RESET_N AVDD_3P3 Active Low Input. Hold low for >10 μs. This pin requires a1 kΩ pull-up resistor to AVDD_3P3. Media Dependent Interface (MDI) 12 MDI_0_P AVDD_3P3 Transmit/Receive Differential Pair 0 Supporting 10 Mbps, 100 Mbps, and 1 Gbps. 13 MDI_0_N AVDD_3P3 Transmit/Receive Differential Pair 0 Supporting 10 Mbps, 100 Mbps, and 1 Gbps. 14 MDI_1_P AVDD_3P3 Transmit/Receive Differential Pair 1 Supporting 10 Mbps, 100 Mbps, and 1 Gbps. 15 MDI_1_N AVDD_3P3 Transmit/Receive Differential Pair 1 Supporting 10 Mbps, 100 Mbps, and 1 Gbps. 16 MDI_2_P AVDD_3P3 Transmit/Receive Differential Pair 2 for 1000BASE-T Mode. Unused in other modes. 17 MDI_2_N AVDD_3P3 Transmit/Receive Differential Pair 2 for 1000BASE-T Mode. Unused in other modes. 18 MDI_3_P AVDD_3P3 Transmit/Receive Differential Pair 3 for 1000BASE-T Mode. Unused in other modes. 19 MDI_3_N AVDD_3P3 Transmit/Receive Differential Pair 3 for 1000BASE-T Mode. Unused in other modes. MAC Interface 1 TXD_1 VDDIO RGMII/RMII/MII Transmit Data 1 Input. See the MAC Interface section. 2 TXD_2 VDDIO RGMII/MII Transmit Data 2 Input. See the MAC Interface section. 3 TXD_3 VDDIO RGMII/MII Transmit Data 3 Input. See the MAC Interface section. 29 RXD_3/PHYAD_31 VDDIO RGMII/MII Receive Data 3 Output (RXD_3). See the MAC Interface section. |
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