| Motore di ricerca datesheet componenti elettronici |
|
SSM2529ACBZ-R7 Scheda tecnica(PDF) 27 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
SSM2529ACBZ-R7 Scheda tecnica(HTML) 27 Page - Analog Devices |
|
27 / 52 page ![]() Data Sheet SSM2529 Rev. 0 | Page 27 of 52 REGISTER DETAILS SOFTWARE RESET AND MASTER SOFTWARE POWER-DOWN CONTROL (PWR_CTRL) REGISTER Table 47. Address: 0x00, Reset: 0x23, Name: PWR_CTRL Bits Bit Name Settings Description Reset Access 7 SYS_RST Software reset 0x0 RW 0 Normal operation 1 Software reset 6 APWDN_ANA Auto power-down mode 0x0 RW 0 Only digital 1 Both analog and digital 5 APWDN_EN Auto power-down enable 0x1 RW 0 Auto power-down disabled 1 Auto power-down enabled 4 LP_MODE Low power mode 0x0 RW 0 Normal operation 1 Low power operation mode; DAC runs at half speed [3:1] MCS Master clock rate selection 0x1 RW 000 Refer to Table 48 001 Refer to Table 48 010 Refer to Table 48 011 Refer to Table 48 100 Refer to Table 48 101 Refer to Table 48 110 Not applicable 111 Not applicable 0 SPWDN Master software power-down 0x1 RW 0 Normal operation 1 Software master power-down Table 48 shows the MCS bit settings available with the possible input sample rates vs. the required master clock frequency, as well as the master clock to bit clock ratio. The b110 thru b111 settings are reserved and not available to the user. MCLK RATIO AND FREQUENCY Table 48. MCS Bit Field Setting—MCLK Ratio and Frequency (N/A = Not Applicable) Input Sample Frequency, fS (kHz) Setting 0 b000 Setting 1 b001 Setting 2 b010 Setting 3 b011 Setting 4 b100 Setting 5 b101 Setting 6 b110 thru b111 8 Ratio 768 f S 1024 f S 1536 f S 2048 f S 3072 f S 4096 f S Reserved MCLK 6.144 MHz 8.192 MHz 12.288 MHz 16.384 MHz 24.576 MHz 32.768 MHz 11.025 Ratio N/A 512 f S 1024 f S 1536 f S 2048 f S 3072 f S Reserved MCLK 5.6448 MHz 11.2896 MHz 16.9344 MHz 22.5792 MHz 33.8688 MHz 12 Ratio N/A 512 f S 1024 f S 1536 f S 2048 f S 3072 f S Reserved MCLK 6.144 MHz 12.288 MHz 18.432 MHz 24.576 MHz 38.864 MHz 16 Ratio 384 f S 512 f S 768 f S 1024 f S 1536 f S 2048 f S Reserved MCLK 6.144 MHz 8.192 MHz 12.288 MHz 16.384 MHz 24.576 MHz 32.768 MHz 22.05 Ratio N/A 256 f S 512 f S 768 f S 1024 f S 1536 f S Reserved MCLK 5.6448 MHz 11.2896 MHz 16.9344 MHz 22.5792 MHz 33.8688 MHz 24 Ratio N/A 256 f S 512 f S 768 f S 1024 f S 1536 f S Reserved MCLK 6.144 MHz 12.288 MHz 18.432 MHz 24.576 MHz 38.864 MHz 32 Ratio 192 f S 256 f S 384 f S 512 f S 768 f S 1024 f S Reserved MCLK 6.144 MHz 8.192 MHz 12.288 MHz 16.384 MHz 24.576 MHz 32.768 MHz 44.1 Ratio N/A 128 f S 256 f S 384 f S 512 f S 768 f S Reserved MCLK 5.6448 MHz 11.2896 MHz 16.9344 MHz 22.5792 MHz 33.8688 MHz |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |