SSM2529ACBZ-R7 datasheet(29/52 Pages) AD

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Data Sheet

SSM2529

Rev. 0 | Page 29 of 52

Bits

Bit Name

Settings

Description

Reset

Access

[2:0]

Sample rate selection

0x2

000

11.025 kHz, 12 kHz

001

22.05 kHz, 24 kHz

010

44.1 kHz, 48 kHz

011

96 kHz

100

8 kHz

101

16 kHz

110

32 kHz

111

Reserved

SERIAL AUDIO INTERFACE CONTROL (SAI_FMT2) REGISTER

Table 51. Address: 0x03, Reset: 0x00, Name: SAI_FMT2

Bits

Bit Name

Settings

Description

Reset

Access

LPST

Small power stage enable

0x0

Disabled

Enabled

[6:5]

LR_SEL

L/R channel selector

0x0

Select left channel

Select right channel

Select (left + right)/2

Select (left − right)/2

LRCLK_MODE

LRCLK mode selection for TDM operation

0x0

50% duty cycle LRCLK

Pulse mode LRCLK

LRCLK_POL

LRCLK polarity control

0x0

Normal LRCLK operation

Inverted LRCLK operation

SAI_MSB

SDATA bit stream order

0x0

MSB first SDATA

LSB first SDATA

BCLK_TDMC

BCLK cycles per frame in TDM modes select

0x0

32 BCLK cycles per slot

16 BCLK cycles per slot

BCLK_EDGE

BCLK active edge select

0x0

Rising BCLK edge used (if PDM_MODE = 1, L data is registered on the

rising edge, and R data is registered on the falling edge)

Falling BCLK edge used (if PDM_MODE = 1, R data is registered on the

rising edge, and L data is registered on the falling edge)

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