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SSM2529ACBZ-R7 Scheda tecnica(PDF) 33 Page - Analog Devices

Il numero della parte SSM2529ACBZ-R7
Spiegazioni elettronici  Digital Input, Mono 2 W, Class-D Audio Power Amplifier
PDF  52 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

SSM2529ACBZ-R7 Scheda tecnica(HTML) 33 Page - Analog Devices

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Data Sheet
SSM2529
Rev. 0 | Page 33 of 52
APLL_CTRL5 REGISTER
Table 61. Address: 0x0D, Reset: 0x00, Name: APLL_CTRL5
Bits
Bit Name
Settings
Description
Reset
Access
7
Reserved
Reserved
0x0
RW
[6:3]
R
Integer part of APLL
0x0
RW
0010
R = 2
0011
R = 3
0100
R = 4
0101
R = 5
0110
R = 6
0111
R = 7
1000
R = 8
[2:1]
X
APLL input clock divider
0x0
RW
00
X = 1
01
X = 2
10
X = 3
11
X = 4
0
Type
APLL operation mode
0x0
RW
0
Integer
1
Fractional
APLL_CTRL6 REGISTER
Table 62. Address: 0x0E, Reset: 0x30, Name: APLL_CTRL6
Bits
Bit Name
Settings
Description
Reset
Access
[7:6]
FSYS_DPLL
0x0
RW
00
Analog OSC Clock Rate 1
01
Analog OSC Clock Rate 2
10
Analog OSC Clock Rate 3
11
Analog OSC Clock Rate 4
5
DPLL_BYPASS
0x1
RW
0
Enable DPLL
1
Bypass DPLL (default)
4
APLL_BYPASS
0x1
RW
0
Enable APLL
1
Bypass APLL (default)
3
DPLL_LOCK
0x0
R
0
DPLL not locked
1
DPLL locked
2
APLL_LOCK
0x0
R
0
APLL not locked
1
APLL locked
1
PLLEN
0x0
RW
0
Disable internal PLL (default)
1
Enable internal PLL
0
COREN
Core clock enable
0x0
RW
0
Core clock disable (default)
1
Core clock enable



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