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SSM2529ACBZ-R7 Scheda tecnica(PDF) 31 Page - Analog Devices

Il numero della parte SSM2529ACBZ-R7
Spiegazioni elettronici  Digital Input, Mono 2 W, Class-D Audio Power Amplifier
PDF  52 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

SSM2529ACBZ-R7 Scheda tecnica(HTML) 31 Page - Analog Devices

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Data Sheet
SSM2529
Rev. 0 | Page 31 of 52
VOLUME CONTROL BEFORE FDSP (VOL_BF_FDSP) REGISTER
Table 53. Address: 0x05, Reset: 0x40, Name: VOL_BF_FDSP
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
DIG_VOL
Volume control before FDSP
0x40
RW
00000000
+24 dB
00000001
+23.625 dB
00000010
+23.35 dB
00000011
+22.875 dB
00000100
+22.5 dB
00000101
...
00111111
+0.375 dB
01000000
0 dB
01000001
−0.375 dB
01000010
...
11111101
−70.875 dB
11111110
−71.25 dB
11111111
Mute
VOLUME CONTROL AFTER FDSP (VOL_AF_FDSP) REGISTER
Table 54. Address: 0x06, Reset: 0x40, Name: VOL_AF_FDSP
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
PDP_VOL
Volume control after FDSP
0x40
RW
00000000
+24 dB
00000001
+23.625 dB
00000010
+23.35 dB
00000011
+22.875 dB
00000100
+22.5 dB
00000101
...
00111111
+0.375 dB
01000000
0 dB
01000001
−0.375 dB
01000010
...
11111101
−70.875 dB
11111110
−71.25 dB
11111111
Mute
VOLUME AND MUTE CONTROL REGISTER
Table 55. Address: 0x07, Reset: 0x20, Name: Volume and Mute Control
Bits
Bit Name
Settings
Description
Reset
Access
7
CLK_LOSS_DET
Clock loss detect enable
0x0
RW
0
Clock loss detect disabled
1
Clock loss detect enabled
[6:4]
SR_AUTO
Auto detected sample rate
0x2
R
000
11.025 kHz/12 kHz
001
22.05 kHz/24 kHz
010
44.1 kHz/48 kHz
011
96 kHz
100
8 kHz
101
16 kHz
110
32 kHz
111
Wrong sample rate
3
Reserved
Reserved
0x0
RW



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