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PIIX3 Scheda tecnica(PDF) 29 Page - Intel Corporation

Il numero della parte PIIX3
Spiegazioni elettronici  82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR
PDF  122 Pages
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Produttore elettronici  INTEL [Intel Corporation]
Homepage  http://www.intel.com
Logo INTEL - Intel Corporation

PIIX3 Scheda tecnica(HTML) 29 Page - Intel Corporation

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82371FB (PIIX) AND 82371SB (PIIX3)
29
Address
Address (bits)
Type
Name
Access
(hex)
FEDC
BA98
7654
3210
00CAh3
0000
0000
1100
101x
r/w
DMA2 CH2 Base and Current
Count
PCI
00CCh3
0000
0000
1100
110x
r/w
DMA2 CH3 Base and Current
Address
PCI
00CEh3
0000
0000
1100
111x
r/w
DMA2 CH3 Base and Current
Count
PCI
00D0h3
0000
0000
1101
000x
r/w
DMA2 Status(r) Command(w)
PCI
00D2h3
0000
0000
1101
001x
wo
DMA2 Write Request
PCI
00D4h3
0000
0000
1101
010x
wo
DMA2 Write Single Mask Bit
PCI
00D6h3
0000
0000
1101
011x
wo
DMA2 Write Mode
PCI
00D8h3
0000
0000
1101
100x
wo
DMA2 Clear Byte Pointer
PCI
00DAh3
0000
0000
1101
101x
wo
DMA2 Master Clear
PCI
00DCh3
0000
0000
1101
110x
wo
DMA2 Clear Mask
PCI
00DEh3
0000
0000
1101
111x
r/w
DMA2 Read/Write All Mask
Register Bits
PCI
00F0h1
0000
0000
1111
0000
wo
Coprocessor Error
PCI/ISA
04D0h
0000
0100
1101
0000
r/w
INT-1 edge/level control
PCI/ISA
04D1h
0000
0100
1101
0001
r/w
INT-2 edge/level control
PCI/ISA
0CF9h
0000
1100
1111
1001
r/w
Reset Control
PCI
NOTES:
1.
Read and write accesses to these locations are always broadcast to the ISA Bus.
2.
Write accesses to these locations are broadcast to the ISA Bus. Read Accesses are not.
PIIX: If programmed in the ISA Controller Recovery Timer register, the PIIX will not alias the 90h-9Fh address range with
the following addresses: 80h, 84
−86h, 88h, and 8C−8Eh. In this case accesses to the 90h - 9Fh address range for the
previously specified addresses are forwarded to the ISA Bus for both reads and writes and are ignored during ISA Master
cycles (i.e., They are no-longer considered PIIX registers). Note, that port 92 is always a distinct ISA register and is always
forwarded to the ISA Bus.
PIIX3: If programmed in the ISA Controller Recovery Timer register, the PIIX3 does not alias the entire 90h-9Fh address
range. These locations are considered ISA Bus register locations and not PIIX3 registers.
3.
ISA-Compatible DMA register I/O space accesses are always subtractively decoded.



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