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PIIX3 Scheda tecnica(PDF) 38 Page - Intel Corporation |
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PIIX3 Scheda tecnica(HTML) 38 Page - Intel Corporation |
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38 / 122 page ![]() 82371FB (PIIX) AND 82371SB (PIIX3) E 38 Bit Description 6 PIIX: Reserved. PIIX3: EXTSMI# Mode Enable (ESMIME) R/W. 1=Enable. 0=Disable (default). This bit is used to enable a special SERR# handling protocol between the host-to-PCI bridge and the PIIX3. When ESMIME is enabled, the operating mode of the EXTSMI# signal is determined by the duration of the EXTSMI# signal. If the EXTSMI# signal is asserted for one PCLK, an SERR# is reported in the NMISC Register (address 61h) and an NMI is generated, if enabled in the NMI Registers (address 61h and 70h). If EXTSMI# is asserted for more than one PCLK, the standard mode for handling EXTSMI# is used (i.e., same as when this bit is set to 0). When disabled (standard mode) and a falling edge is detected on EXTSMI#, an SMI is signaled, if EXTSMI# signaling is enabled. Host-to-PCI Bridge SERR# Gate not necessary if system EXTSMI# is not used System EXTSMI# (Assumes minimum assertion of more than one PCLK) EXTSMI# PIIX3 SMI_NMI.drw 5 Reserved. 4 PIIX: Reserved. PIIX3: USB Enable (USBE) R/W. 1=Enable. 0=Disable (default). When disabled, all USB functionality is disabled. This bit must be set to 1 to access function 2 configuration space. Note that dynamically disabling USB is not supported in PIIX3. This bit is used to enable/disable the USB at boot time. In case software has to disable the USB during run time it has to do the following: Software must turn off the master enable and I/O Decode Enable for function 2 (via the PCICMD Register, function 2) prior to writing this bit to 0. 3 Reserved. 2 PIIX: PCI Header Type Bit Enable R/W. This bit controls the Header Type Bit in the PIIX register 0Eh which defines the PIIX as a multifunction device. This bit defaults to 1 (Multifunction device) and should be left in the default state. PIIX3: Reserved. 1 PIIX: Internal ISA DMA or External DMA Mode Status (IEDMAS) RO. 0=Normal DMA Operation. This bit reports the strapping option selected on the TC signal (pulled high at reset for a value of 0). PIIX3: Reserved, |
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