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HYB18T512400B2C Scheda tecnica(PDF) 4 Page - Qimonda AG |
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HYB18T512400B2C Scheda tecnica(HTML) 4 Page - Qimonda AG |
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4 / 69 page ![]() Internet Data Sheet Rev. 1.12, 2007-05 4 10062006-YPTZ-CDR7 HY[B/I]18T512[40/80/16]0B2[C/F](L) 512-Mbit Double-Data-Rate-Two SDRAM TABLE 2 Performance table for –3(S) TABLE 3 Performance Table for –3.7 TABLE 4 Performance Table for –5 Product Type Speed Code –3 –3S Unit Speed Grade DDR2–667C 4–4–4 DDR2–667D 5–5–5 — Max. Clock Frequency @CL5 f CK5 333 333 MHz @CL4 f CK4 333 266 MHz @CL3 f CK3 200 200 MHz Min. RAS-CAS-Delay t RCD 12 15 ns Min. Row Precharge Time t RP 12 15 ns Min. Row Active Time t RAS 45 45 ns Min. Row Cycle Time t RC 57 60 ns Product Type Speed Code –3.7 Unit Speed Grade DDR2–533C 4–4–4 — Max. Clock Frequency @CL5 f CK5 266 MHz @CL4 f CK4 266 MHz @CL3 f CK3 200 MHz Min. RAS-CAS-Delay t RCD 15 ns Min. Row Precharge Time t RP 15 ns Min. Row Active Time t RAS 45 ns Min. Row Cycle Time t RC 60 ns Product Type Speed Code –5 Units Speed Grade DDR2–400B 3–3–3 — Max. Clock Frequency @CL5 f CK5 200 MHz @CL4 f CK4 200 MHz @CL3 f CK3 200 MHz Min. RAS-CAS-Delay t RCD 15 ns Min. Row Precharge Time t RP 15 ns Min. Row Active Time t RAS 40 ns Min. Row Cycle Time t RC 55 ns |
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