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HYB18T512400B2C Scheda tecnica(PDF) 14 Page - Qimonda AG

Il numero della parte HYB18T512400B2C
Spiegazioni elettronici  512-Mbit Double-Data-Rate-Two SDRAM
PDF  69 Pages
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Produttore elettronici  QIMONDA [Qimonda AG]
Homepage  http://www.qimonda.com
Logo QIMONDA - Qimonda AG

HYB18T512400B2C Scheda tecnica(HTML) 14 Page - Qimonda AG

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Internet Data Sheet
Rev. 1.12, 2007-05
14
10062006-YPTZ-CDR7
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
TABLE 8
Abbreviations for Ball Type
TABLE 9
Abbreviations for Buffer Type
Abbreviation
Description
I
Standard input-only ball. Digital levels.
O
Output. Digital levels.
I/O
I/O is a bidirectional input/output signal.
AI
Input. Analog levels.
PWR
Power
GND
Ground
NC
Not Connected
Abbreviation
Description
SSTL
Serial Stub Terminated Logic (SSTL_18)
LV-CMOS
Low Voltage CMOS
CMOS
CMOS Levels
OD
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.



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