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HYB18T512400B2C Scheda tecnica(PDF) 59 Page - Qimonda AG

Il numero della parte HYB18T512400B2C
Spiegazioni elettronici  512-Mbit Double-Data-Rate-Two SDRAM
PDF  69 Pages
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Produttore elettronici  QIMONDA [Qimonda AG]
Homepage  http://www.qimonda.com
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HYB18T512400B2C Scheda tecnica(HTML) 59 Page - Qimonda AG

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Internet Data Sheet
Rev. 1.12, 2007-05
59
10062006-YPTZ-CDR7
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
TABLE 50
Absolute Jitter Value Definitions
Example: for DDR2-667,
t
CH.ABS.MIN = (0.48 x 3000ps) – 125 ps = 1315 ps = 0.438 x 3000 ps.
Table 51 shows clock-jitter specifications.
TABLE 51
Clock-Jitter Specifications for –667 and –800
Symbol
Parameter
Min.
Max.
Unit
t
CK.ABS
Clock period
t
CK.AVG(Min) + tJIT.PER(Min)
t
CK.AVG(Max) + tJIT.PER(Max)
ps
t
CH.ABS
Clock high-pulse width
t
CH.AVG(Min) x tCK.AVG(Min) + tJIT.DUTY(Min)
t
CH.AVG(Max) x tCK.AVG(Max) +
t
JIT.DUTY(Max)
ps
t
CL.ABS
Clock low-pulse width
t
CL.AVG(Min) x tCK.AVG(Min) + tJIT.DUTY(Min)
t
CL.AVG(Max) x tCK.AVG(Max) +
t
JIT.DUTY(Max)
ps
Symbol
Parameter
DDR2 -667
DDR2 -800
Unit
Min.
Max.
Min.
Max.
t
CK.AVG
Average clock period nominal w/o jitter
3000
8000
2500
8000
ps
t
JIT.PER
Clock-period jitter
–125
+125
–100
+100
ps
t
JIT(PER,LCK)
Clock-period jitter during DLL locking period
–100
+100
–80
+80
ps
t
JIT.CC
Cycle-to-cycle clock-period jitter
–250
+250
–200
+200
ps
t
JIT(CC,LCK)
Cycle-to-cycle clock-period jitter during DLL-
locking period
–200
+200
–160
+160
ps
t
ERR.2PER
Cumulative error across 2 cycles
–175
+175
–150
+150
ps
t
ERR.3PER
Cumulative error across 3 cycles
–225
+225
–175
+175
ps
t
ERR.4PER
Cumulative error across 4 cycles
–250
+250
–200
+200
ps
t
ERR.5PER
Cumulative error across 5 cycles
–250
+250
–200
+200
ps
t
ERR(6-10PER)
Cumulative error across n cycles with n = 6 ..
10, inclusive
–350
+350
–300
+300
ps
t
ERR(11-50PER)
Cumulative error across n cycles with n = 11 ..
50, inclusive
–450
+450
–450
+450
ps
t
CH.AVG
Average high-pulse width
0.48
0.52
0.48
0.52
t
CK.AVG
t
CL.AVG
Average low-pulse width
0.48
0.52
0.48
0.52
t
CK.AVG
t
JIT.DUTY
Duty-cycle jitter
–125
+125
–100
+100
ps



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