HYB18T512400B2C datasheet(28/69 Pages) QIMONDA

28 / 69 page

Internet Data Sheet

Rev. 1.12, 2007-05

10062006-YPTZ-CDR7

HY[B/I]18T512[40/80/16]0B2[C/F](L)

512-Mbit Double-Data-Rate-Two SDRAM

Electrical Characteristics

This chapter describes the electrical characteristics.

5.1

Absolute Maximum Ratings

Caution is needed not to exceed absolute maximum ratings of the DRAM device listed in Table 20 at any time.

TABLE 20

Absolute Maximum Ratings

Attention: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum rating conditions for extended periods may affect reliability.

TABLE 21

DRAM Component Operating Temperature Range

Symbol

Parameter

Rating

Unit

Note

Min.

Max.

Voltage on

DD pin relative to VSS

–1.0

+2.3

1) When

DD and VDDQ and VDDL are less than 500 mV; VREF may be equal to or less than 300 mV.

DDQ

Voltage on

DDQ pin relative to VSS

–0.5

+2.3

1)2)

DDL

Voltage on

DDL pin relative to VSS

–0.5

+2.3

1)2)

IN, VOUT

Voltage on any pin relative to

–0.5

+2.3

STG

Storage Temperature

–55

+100

°C

1)2)

2) Storage Temperature is the case surface temperature on the center/top side of the DRAM.

Symbol

Parameter

Rating

Unit

Note

Min.

Max.

OPER

Operating Temperature

°C

1)2)3)4)

1) Operating Temperature is the case surface temperature on the center / top side of the DRAM.

2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation, the DRAM case

temperature must be maintained between 0 - 95 °C under all other specification parameters.

3) Above 85

°C the Auto-Refresh command interval has to be reduced to t

REFI= 3.9 µs

4) When operating this product in the 85 °C to 95 °C

CASE temperature range, the High Temperature Self Refresh has to be enabled by

setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of

DD6 by approximately 50 %

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