HYB18T512400B2C datasheet(21/69 Pages) QIMONDA

Il numero della parte	HYB18T512400B2C

Spiegazioni elettronici	512-Mbit Double-Data-Rate-Two SDRAM

PDF	69 Pages

Scroll/Zoom	100%

Produttore elettronici	QIMONDA [Qimonda AG]

Homepage	http://www.qimonda.com

Logo

21 / 69 page

Internet Data Sheet

Rev. 1.12, 2007-05

10062006-YPTZ-CDR7

HY[B/I]18T512[40/80/16]0B2[C/F](L)

512-Mbit Double-Data-Rate-Two SDRAM

RDQS

Read Data Strobe Output (RDQS, RDQS)

RDQS Disable

RDQS Enable

DQS

Complement Data Strobe (DQS Output)

DQS Enable

DQS Disable

OCD

Program

[9:7]

Off-Chip Driver Calibration Program

000B OCD OCD calibration mode exit, maintain setting

001B OCD Drive (1)

010B OCD Drive (0)

100B OCD Adjust mode

111B OCD OCD calibration default

[5:3]

Additive Latency

Note: All other bit combinations are illegal.

000B AL 0

001B AL 1

010B AL 2

011B AL 3

100B AL 4

101B AL 5

110B AL 6

RTT

6,2

Nominal Termination Resistance of ODT

Note: See Table 23 “ODT DC Electrical Characteristics” on Page 29

00B RTT ∞ (ODT disabled)

01B RTT 75 Ohm

10B RTT 150 Ohm

11B RTT 50 Ohm

DIC

Off-chip Driver Impedance Control

DIC Full (Driver Size = 100%)

DIC Reduced

DLL

DLL Enable

DLL Disable

1) w = write only register bits

Field

Bits

Type1)

Description

HYB18T512400B2C Scheda tecnica(PDF) 21 Page - Qimonda AG

HYB18T512400B2C Scheda tecnica(HTML) 21 Page - Qimonda AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Scheda tecnica Scarica

Link URL