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HYB18T512400B2C Scheda tecnica(PDF) 18 Page - Qimonda AG

Il numero della parte HYB18T512400B2C
Spiegazioni elettronici  512-Mbit Double-Data-Rate-Two SDRAM
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Produttore elettronici  QIMONDA [Qimonda AG]
Homepage  http://www.qimonda.com
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Internet Data Sheet
Rev. 1.12, 2007-05
18
10062006-YPTZ-CDR7
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
2.2
512 Mbit DDR2 Addressing
This chapter contents the table for the 512 Mbit DDR2 Addressing.
TABLE 10
512-Mbit DDR2 Addressing
Configuration
128Mb x 41)
1) Refered to as ’org’
64Mb x 81)
32Mb x 161)
Note
Bank Address
BA[1:0]
BA[1:0]
BA[1:0]
Number of Banks
4
4
4
Auto-Precharge
A10 / AP
A10 / AP
A10 / AP
Row Address
A[13:0]
A[13:0]
A[12:0]
Column Address
A11, A[9:0]
A[9:0]
A[9:0]
Number of Column Address Bits
11
10
10
2)
2) Refered to as ’colbits’
Number of I/Os
4
8
16
Page Size [Bytes]
1024 (1K)
1024 (1K)
2048 (2K)
3)
3) PageSize = 2colbits
× org/8 [Bytes]



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