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HYB18T512400B2C Scheda tecnica(PDF) 13 Page - Qimonda AG |
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HYB18T512400B2C Scheda tecnica(HTML) 13 Page - Qimonda AG |
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13 / 69 page ![]() Internet Data Sheet Rev. 1.12, 2007-05 13 10062006-YPTZ-CDR7 HY[B/I]18T512[40/80/16]0B2[C/F](L) 512-Mbit Double-Data-Rate-Two SDRAM A1 V DD PWR — Power Supply A7,B2,B8,D2, D8 V SSQ PWR — I/O Driver Power Supply A3,E3 V SS PWR — Power Supply Power Supplies ×4/×8 organizations E2 V REF AI — I/O Reference Voltage E1 V DDL PWR — Power Supply E9,H9,L1 V DD PWR — Power Supply E7 V SSDL PWR — Power Supply J1,K9 V SS PWR — Power Supply Power Supplies ×16 organization J2 V REF AI — I/O Reference Voltage E9, G1, G3, G7, G9 V DDQ PWR — I/O Driver Power Supply J1 V DDL PWR — Power Supply E1, J9, M9, R1 V DD PWR — Power Supply E7, F2, F8, H2, H8 V SSQ PWR — I/O Driver Power Supply J7 V SSDL PWR — Power Supply A3, E3,J3,N1,P9 V SS PWR — Power Supply Not Connected ×4/×8 organization G1, L3,L7, L8 NC NC — Not Connected Not Connected ×4 organization A2, B1, B9, D1, D9 NC NC — Not Connected Not Connected ×16 organization A2, E2, L1, R3, R7, R8 NC NC — Not Connected Other Balls ×4/×8 organizations F9 ODT I SSTL On-Die Termination Control Other Balls ×16 organization K9 ODT I SSTL On-Die Termination Control Ball# Name Ball Type Buffer Type Function |
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