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TMP89FS60 Scheda tecnica(PDF) 68 Page - Toshiba Semiconductor |
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TMP89FS60 Scheda tecnica(HTML) 68 Page - Toshiba Semiconductor |
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68 / 410 page ![]() Page 54 3. Interrupt Control Circuit 3.4 Maskable Interrupt Priority Change Function TMP89FS60 RA003 3.4 Maskable Interrupt Priority Change Function The priority of maskable interrupts (IL4 to IL27) can be changed to four levels, Levels 0 to 3, regardless of the basic priorities 5 to 28. Interrupt priorities can be changed by the interrupt priority change control register (ILPRS1 to ILPRS6). To raise the interrupt priority, set the Level to a larger number. To lower the interrupt priority, set the Level to a smaller number. When different maskable interrupts are generated simultaneously at the same level, the interrupt with higher basic priority is processed preferentially. For example, when the ILPRS1 register is set to 0xC0 and interrupts IL4 and IL7 are generated at the same time, IL7 is preferentially processed (provided that EF4 and EF7 have been enabled). After reset is released, all maskable interrupts are set to priority level 0 (the lowest priority). Note: In the main program, before manipulating the interrupt priority change control register (ILPRS1 to 6), be sure to clear the master enable flag (IMF) to "0" (Disable interrupt by DI instruction). Set the IMF to "1" as required after operating ILPRS1 to 6 (Enable interrupt by EI instruction). In the interrupt service routine, the IMF becomes "0" automatically and need not be cleared to "0" normally. How- ever, if using multiple interrupt in the interrupt service routine, manipulate ILPRS1 to 6 before setting the IMF to "1". Interrupt priority change control register 1 ILPRS1 76543 210 (0x0FF0) Bit Symbol IL07P IL06P IL05P IL04P Read/Write R/W R/W R/W R/W After reset 00000 000 IL07P Sets the interrupt priority of IL7. 00: Level 0 (lower priority) IL06P Sets the interrupt priority of IL6. 01: Level 1 IL05P Sets the interrupt priority of IL5. 10: Level 2 IL04P Sets the interrupt priority of IL4. 11: Level 3 (higher priority) Interrupt priority change control register 2 ILPRS2 76543 210 (0x0FF1) Bit Symbol IL11P IL10P IL09P IL08P Read/Write R/W R/W R/W R/W After reset 00000 000 IL11P Sets the interrupt priority of IL11. 00: Level 0 (lower priority) IL10P Sets the interrupt priority of IL10. 01: Level 1 IL09P Sets the interrupt priority of IL9. 10: Level 2 IL08P Sets the interrupt priority of IL8. 11: Level 3 (higher priority) Interrupt priority change control register 3 ILPRS3 76543 210 (0x0FF2) Bit Symbol IL15P IL14P IL13P IL12P Read/Write R/W R/W R/W R/W After reset 00000 000 IL15P Sets the interrupt priority of IL15. 00: Level 0 (lower priority) IL14P Sets the interrupt priority of IL14. 01: Level 1 IL13P Sets the interrupt priority of IL13. 10: Level 2 IL12P Sets the interrupt priority of IL12. 11: Level 3 (higher priority) |
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