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TMP89FS60 Scheda tecnica(PDF) 25 Page - Toshiba Semiconductor

Il numero della parte TMP89FS60
Spiegazioni elettronici  8 Bit Microcontroller
PDF  410 Pages
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Produttore elettronici  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Scheda tecnica(HTML) 25 Page - Toshiba Semiconductor

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Page 11
TMP89FS60
RA001
Note: Bits 7 to 3 of SYSSR4 are read as "0".
2.2.1.2
BOOTROM
The BOOTROM is not mapped in the code area or the data area after reset release.
Note 1: When the BOOTROM is not mapped in the code area, an instruction is fetched from the Flash or an
SWI instruction is fetched, depending on the capacity of the internal Flash.
Note 2: Only the first 2 Kbytes of the BOOTROM are mapped in the memory map, except in the serial PROM
mode.
Note: The flash memory control register 1 has a double-buffer structure comprised of the register FLSCR1 and a shift register.
Writing "0xD5" to the register FLSCR2 allows a register setting to be reflected and take effect in the shift register. This
means that a register setting value does not take effect until "0xD5" is written to the register FLSCR2. The value of the shift
register can be checked by reading the register FLSCRM.
System control status register 4
SYSSR4
(0x0FDF)
76543
210
Bit Symbol
-----
RVCTRS
RAREAS
(RSTDIS)
Read/Write
RRRRRRRR
After reset
00000
000
RAREAS
Status of mapping of the RAM in the
code area
0 :
1 :
The enabled SYSCR3<RAREA> data is "0".
The enabled SYSCR3<RAREA> data is "1".
RVCTRS
Status of mapping of the vector
address in the area
0 :
1 :
The enabled SYSCR3<RVCTR> data is "0".
The enabled SYSCR3<RVCTR> data is "1".
Example: Program transfer (Transfer the program saved in the data area to the RAM.)
LD
HL, TRANSFER_START_ADDRESS
; Destination RAM address
LD
DE, PROGRAM_START_ADDRESS
; Source ROM address
LD
BC, BYTE_OF_PROGRAM
; Number of bytes of the program to be executed -1
TRANS_RAM:
LD
A, (DE)
; Reading the program to be transferred
LD
(HL), A
; Writing the program to be transferred
INC
HL
; Destination address increment
INC
DE
; Source address increment
DEC
BC
; Have all the programs been transferred?
JRS
F, TRANS_RAM
Setting FLSMD<BAREA> to "1" maps the BOOTROM to 0x1000 to 0x17FF in the code area and to
0x1000 to 0x17FF in the data area. The BOOTROM can be easily written into the Flash by using the Ap-
plication Programming Interface (API) integrated in the BOOTROM.
Flash memory control register 1
FLSCR1
(0x0FD0)
76543
210
Bit Symbol
(FLSMD)
BAREA
(FAREA)
(ROMSEL)
Read/Write
R/W
R/W
R/W
R/W
After reset
01000
000
BAREA
Specifies mapping of the
BOOTROM in the code and data
areas
0 :
1 :
The BOOTROM is not mapped to 0x1000 to 0x17FF in the code area and
to 0x1000 to 0x17FF in the data area.
The BOOTROM is mapped to 0x1000 to 0x17FF in the code area and to
0x1000 to 0x17FF in the data area.



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