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TMP89FS60 Scheda tecnica(PDF) 97 Page - Toshiba Semiconductor

Il numero della parte TMP89FS60
Spiegazioni elettronici  8 Bit Microcontroller
PDF  410 Pages
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Produttore elettronici  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Scheda tecnica(HTML) 97 Page - Toshiba Semiconductor

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Page 83
TMP89FS60
RA002
7.3.1
Enabling/disabling the voltage detection operation
Setting VDCR2<VDxEN> to "1" enables the voltage detection operation. Setting it to "0" disables the oper-
ation.
VDCR2<VDxEN> is cleared to "0" immediately after a power-on reset or a reset by an external reset input is
released.
Note:When the supply voltage (VDD) is lower than the detection voltage (VDxLVL), setting VDCR2<VDxEN> to "1"
generates a voltage detection interrupt request signal or a voltage detection reset signal at the time.
7.3.2
Selecting the voltage detection operation mode
If the voltage detection operation mode is set to generate voltage detection interrupt request signals
(VDCR1<VDxMOD>="0") and VDCR2<VDxEN> is set to "1", a voltage detection interrupt request signal is
generated when the supply voltage (VDD) becomes lower than the detection voltage (VDxLVL).
If the voltage detection operation mode is set to generate voltage detection reset signals (VDCR1<VDx-
MOD>="1") and VDCR2<VDxEN> is set to "1", a voltage detection reset signal is generated when the supply
voltage (VDD) becomes lower than the detection voltage (VDxLVL).
VDCR1 and VDCR2 are initialized by a power-on reset or an external reset input only. Therefore, the volt-
age detection reset signals are generated continuously, as long as the supply voltage (VDD) is lower than the
detection voltage (VDxLVL).
Note:If the voltage detection mode is set to generate voltage detection interrupt request signals and the supply volt-
age (VDD) becomes lower than the detection voltage (VDxLVL) in the STOP, IDLE0 or SLEEP0 mode, a volt-
age detection interrupt request signal is generated after the operation mode is released and returned to
NORMAL or SLOW mode.
Figure 7-2 Voltage Detection Interrupt Request Signal and Voltage Detection Reset Signal
7.3.3
Selecting the detection voltage level
Select a detection voltage at VDCR1<VDxLVL>.
7.3.4
Voltage detection flag and voltage detection status flag
The magnitude relation between the supply voltage (VDD) and the detection voltage (VDxLVL) can be
checked by reading VDCR1<VDxF> and VDCR1<VDxSF>.
If VDCR2<VDxEN> is set at "1", when the supply voltage (VDD) becomes lower than the detection voltage
(VDxLVL), VDCR1<VDxF> is set to "1" and is held in this state. VDCR1<VDxF> is not cleared to "0" when
the supply voltage (VDD) becomes equal to or higher than the detection voltage (VDxLVL).
When VDCR2<VDxEN> is cleared to "0" after VDCR1<VDxF> is set to "1", the previous state is still held.
To clear VDCR1<VDxF>, "0" must be written to it.
Detection voltage level
VDD level
Voltage detection interrupt
request signal
VDCR2<VDxEN>
Voltage detection reset signal



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