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TMP89FS60 Scheda tecnica(PDF) 116 Page - Toshiba Semiconductor |
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TMP89FS60 Scheda tecnica(HTML) 116 Page - Toshiba Semiconductor |
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116 / 410 page ![]() Page 102 8. I/O Ports 8.3 I/O Port Registers TMP89FS60 RA005 8.3.3 Port P2 (P27 to P20) Port P2 is an 8-bit input/output port that can be set to input or output for each bit individually, and it is also used as the serial bus interface input/output, the serial interface input/output, the UART input/output and the on-chip debug function. The output circuit has the P-channel output control function and either the sink open drain output or the C- MOS output can be selected. Port P2 contains a programmable pull-up resistor on the VDD side. This pull-up resistor can be used when the port is used in the input mode or as a sink open drain output. When this port is used as the serial bus interface, the serial interface or the UART, setting for serial interface selecting function is also needed. For details, refer to "8.4 Serial Interface Selecting Function". For the on-chip debug function, refer to the chapter of "On-chip Debug Function (OCD)". Table 8-8 Port P2 P27P26 P25P24 P23 P22 P21P20 Secondary function -- SCLK0 SI0 SCL0 SO0 SDA0 SCLK0 SI0 RXD0 OCDIO SO0 TXD0 OCDCK |
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