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WM8281ECS/R Scheda tecnica(PDF) 46 Page - Cirrus Logic |
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WM8281ECS/R Scheda tecnica(HTML) 46 Page - Cirrus Logic |
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46 / 392 page ![]() WM8281 46 Rev 4.0 INPUT SIGNAL PATH The WM8281 has eight highly flexible input channels. Selectable combinations of up to six analogue (mic or line) or eight digital input configurations are supported. The analogue input paths support single-ended and differential modes, programmable gain control and are digitised using a high performance 24-bit sigma-delta ADC. The digital input paths interface directly with external digital microphones; a separate microphone interface clock is provided for 4 separate stereo pairs of digital microphones. Digital delay can be applied to any of the digital input paths; this can be used for phase adjustment of any digital input, including directional control of multiple microphones. Three microphone bias (MICBIAS) generators are available, which provide a low noise reference for biasing electret condenser microphones (ECMs) or for use as a low noise supply for MEMS microphones and digital microphones. Digital volume control is available on all inputs (analogue and digital), with programmable ramp control for smooth, glitch-free operation. Any pair of analogue or digital inputs may be selected as input to the Ambient Noise Cancellation (ANC) processing function. The IN1L and IN1R input signal paths and control registers are illustrated in Figure 13. The IN2 and IN3 signal paths are equivalent to the IN1 signal path. The IN4 signal path supports digital microphone input only. IN1L_PGA_VOL [6:0] ADC IN1_MODE [1:0] 00 = Differential IN1xP – IN1xN 01 = Single-ended IN1xP (non-inverting) 10 = Digital Microphone 11 = Reserved IN1L_ENA IN1R_ENA IN1RN/DMICDAT1 IN1RP ADC IN1LN/DMICCLK1 IN1LP IN1R_PGA_VOL [6:0] IN1_DMIC_SUP [1:0] IN1L_DMIC_DLY [5:0] IN1R_DMIC_DLY [5:0] IN1_OSR 00 = 1.536MHz 01 = 3.072MHz 10 = 6.144MHz 11 = 768kHz IN1L_VOL [7:0] IN1R_VOL [7:0] CLK DAT IN1L_HPF IN1R_HPF IN_HPF_CUT[2:0] Digital Mic Interface Figure 13 Input Signal Paths |
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