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WM8281ECS/R Scheda tecnica(PDF) 4 Page - Cirrus Logic |
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WM8281ECS/R Scheda tecnica(HTML) 4 Page - Cirrus Logic |
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4 / 392 page ![]() WM8281 4 Rev 4.0 5-BAND PARAMETRIC EQUALISER (EQ) ...................................................................................................................................72 DYNAMIC RANGE CONTROL (DRC)...........................................................................................................................................76 LOW PASS / HIGH PASS DIGITAL FILTER (LHPF) ....................................................................................................................89 DIGITAL CORE DSP .....................................................................................................................................................................92 TONE GENERATOR .....................................................................................................................................................................94 NOISE GENERATOR ....................................................................................................................................................................96 HAPTIC SIGNAL GENERATOR....................................................................................................................................................96 PWM GENERATOR ....................................................................................................................................................................100 SAMPLE RATE CONTROL .........................................................................................................................................................102 ASYNCHRONOUS SAMPLE RATE CONVERTER (ASRC) .......................................................................................................112 ISOCHRONOUS SAMPLE RATE CONVERTER (ISRC) ............................................................................................................115 DSP FIRMWARE CONTROL .................................................................................................122 DSP FIRMWARE MEMORY CONTROL .....................................................................................................................................122 DSP FIRMWARE EXECUTION ...................................................................................................................................................129 DSP DIRECT MEMORY ACCESS (DMA) CONTROL ................................................................................................................131 DSP DEBUG SUPPORT .............................................................................................................................................................137 AMBIENT NOISE CANCELLATION.......................................................................................140 DIGITAL AUDIO INTERFACE................................................................................................141 MASTER AND SLAVE MODE OPERATION...............................................................................................................................142 AUDIO DATA FORMATS ............................................................................................................................................................142 AIF TIMESLOT CONFIGURATION .............................................................................................................................................144 TDM OPERATION BETWEEN THREE OR MORE DEVICES ....................................................................................................146 DIGITAL AUDIO INTERFACE CONTROL .............................................................................148 AIF SAMPLE RATE CONTROL ..................................................................................................................................................148 AIF MASTER / SLAVE CONTROL ..............................................................................................................................................148 AIF SIGNAL PATH ENABLE .......................................................................................................................................................152 AIF BCLK AND LRCLK CONTROL .............................................................................................................................................155 AIF DIGITAL AUDIO DATA CONTROL.......................................................................................................................................159 AIF TDM AND TRI-STATE CONTROL........................................................................................................................................162 AIF DIGITAL PULL-UP AND PULL-DOWN.................................................................................................................................163 SLIMBUS INTERFACE ..........................................................................................................166 SLIMBUS DEVICES ....................................................................................................................................................................166 SLIMBUS FRAME STRUCTURE ................................................................................................................................................166 CONTROL SPACE ......................................................................................................................................................................166 DATA SPACE ..............................................................................................................................................................................167 SLIMBUS CONTROL SEQUENCES .....................................................................................168 DEVICE MANAGEMENT & CONFIGURATION ..........................................................................................................................168 INFORMATION MANAGEMENT .................................................................................................................................................168 VALUE MANAGEMENT (INCLUDING REGISTER ACCESS) ....................................................................................................169 FRAME & CLOCKING MANAGEMENT ......................................................................................................................................169 DATA CHANNEL CONFIGURATION ..........................................................................................................................................170 SLIMBUS INTERFACE CONTROL........................................................................................171 SLIMBUS DEVICE PARAMETERS .............................................................................................................................................171 SLIMBUS MESSAGE SUPPORT ................................................................................................................................................171 SLIMBUS PORT NUMBER CONTROL .......................................................................................................................................174 SLIMBUS SAMPLE RATE CONTROL ........................................................................................................................................174 SLIMBUS SIGNAL PATH ENABLE .............................................................................................................................................175 SLIMBUS CONTROL REGISTER ACCESS ...............................................................................................................................176 SLIMBUS CLOCKING CONTROL...............................................................................................................................................178 OUTPUT SIGNAL PATH ........................................................................................................180 OUTPUT SIGNAL PATH ENABLE ..............................................................................................................................................182 OUTPUT SIGNAL PATH SAMPLE RATE CONTROL ................................................................................................................184 OUTPUT SIGNAL PATH CONTROL...........................................................................................................................................184 OUTPUT SIGNAL PATH DIGITAL VOLUME CONTROL ...........................................................................................................186 OUTPUT SIGNAL PATH DIGITAL VOLUME LIMIT ....................................................................................................................192 |
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