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WM8281ECS/R Scheda tecnica(PDF) 64 Page - Cirrus Logic |
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WM8281ECS/R Scheda tecnica(HTML) 64 Page - Cirrus Logic |
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64 / 392 page ![]() WM8281 64 Rev 4.0 + OUT6R output + OUT6L output + OUT5R output + OUT5L output + OUT4R output + OUT4L output + OUT3R output + OUT3L output + OUT2R output + OUT2L output + OUT1R output + OUT1L output + AIF3 TX2 output + AIF3 TX1 output AIF3 RX1 (30h) AIF3 RX2 (31h) + AIF1 TX8 output + AIF1 TX7 output + AIF1 TX6 output + AIF1 TX5 output + AIF1 TX4 output + AIF1 TX3 output + AIF1 TX2 output + AIF1 TX1 output AIF1 RX3 (22h) AIF1 RX4 (23h) AIF1 RX5 (24h) AIF1 RX6 (25h) AIF1 RX7 (26h) AIF1 RX8 (27h) AIF1 RX1 (20h) AIF1 RX2 (21h) + SLIMbus TX8 output + SLIMbus TX7 output + SLIMbus TX6 output + SLIMbus TX5 output + SLIMbus TX4 output + SLIMbus TX3 output + SLIMbus TX2 output + SLIMbus TX1 output SLIMbus RX3 (3Ah) SLIMbus RX4 (3Bh) SLIMbus RX5 (3Ch) SLIMbus RX6 (3Dh) SLIMbus RX7 (3Eh) SLIMbus RX8 (3Fh) SLIMbus RX1 (38h) SLIMbus RX2 (39h) + AIF2 TX6 output + AIF2 TX5 output + AIF2 TX4 output + AIF2 TX3 output + AIF2 TX2 output + AIF2 TX1 output AIF2 RX3 (2Ch) AIF2 RX4 (2Dh) AIF2 RX5 (2Eh) AIF2 RX6 (2Fh) AIF2 RX1 (2Ah) AIF2 RX2 (2Bh) Figure 23 Digital Core - External Digital Interfaces DIGITAL CORE MIXERS The WM8281 provides an extensive digital mixing capability. The digital core signal processing blocks and audio interface paths are illustrated in Figure 22 and Figure 23. A 4-input digital mixer is associated with many of these functions, as illustrated. The digital mixer circuit is identical in each instance, providing up to 4 selectable input sources, with independent volume control on each input. The control registers associated with the digital core signal paths are shown in Figure 24 through to Figure 41. The full list of digital mixer control registers is provided in the “Register Map” section (Register R1600 through to R3000). Further description of the associated control registers is provided below. Generic register definitions are provided in Table 8. The digital mixer input sources are selected using the associated *_SRCn registers; the volume control is implemented via the associated *_VOLn registers. |
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