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WM8281ECS/R Scheda tecnica(PDF) 67 Page - Cirrus Logic

Il numero della parte WM8281ECS/R
Spiegazioni elettronici  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Scheda tecnica(HTML) 67 Page - Cirrus Logic

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WM8281
Rev 4.0
67
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
A2h = ISRC1 INT3
A3h = ISRC1 INT4
A4h = ISRC1 DEC1
A5h = ISRC1 DEC2
A6h = ISRC1 DEC3
A7h = ISRC1 DEC4
A8h = ISRC2 INT1
A9h = ISRC2 INT2
AAh = ISRC2 INT3
ABh = ISRC2 INT4
ACh = ISRC2 DEC1
ADh = ISRC2 DEC2
AEh = ISRC2 DEC3
AFh = ISRC2 DEC4
B0h = ISRC3 INT1
B1h = ISRC3 INT2
B2h = ISRC3 INT3
B3h = ISRC3 INT4
B4h = ISRC3 DEC1
B5h = ISRC3 DEC2
B6h = ISRC3 DEC3
B7h = ISRC3 DEC4
Table 8 Digital Core Mixer Control Registers
DIGITAL CORE INPUTS
The digital core comprises multiple input paths as illustrated in Figure 24. Any of these inputs may be
selected as a source to the digital mixers or signal processing functions within the WM8281 digital
core.
Note that the outputs from other blocks within the Digital Core may also be selected as input to the
digital mixers or signal processing functions within the WM8281 digital core. Those input sources,
which are not shown in Figure 24
, are described separately in other sections of the “Digital Core”
description.
The bracketed numbers in Figure 24
, eg. “(10h)” indicate the corresponding *_SRCn register setting
for selection of that signal as an input to another digital core function.
The sample rate for the input signal paths is configured using the applicable IN_RATE, AIFn_RATE or
SLIMRXn_RATE register - see Table 23. Note that sample rate conversion is required when routing
the input signal paths to any signal chain that is asynchronous and/or configured for a different
sample rate.



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