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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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WM8281ECS/R Scheda tecnica(PDF) 22 Page - Cirrus Logic |
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WM8281ECS/R Scheda tecnica(HTML) 22 Page - Cirrus Logic |
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22 / 392 page  WM8281 22 Rev 4.0 Test Conditions The following electrical characteristics are valid across the full range of recommended operating conditions. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Digital Input / Output (except DMICDATn and DMICCLKn) Digital I/O is referenced to DBVDD1, DBVDD2 or DBVDD3. See “Pin Description” for the domain applicable to each pin. Input HIGH Level VIH VDBVDDn = 1.8V ±10% 0.75 VDBVDDn V VDBVDDn = 2.5V ±10% 0.8 VDBVDDn VDBVDDn = 3.3V ±10% 0.7 VDBVDDn Input LOW Level VIL VDBVDDn = 1.8V ±10% 0.3 VDBVDDn V VDBVDDn = 2.5V ±10% 0.25 VDBVDDn VDBVDDn = 3.3V ±10% 0.2 VDBVDDn Note that digital input pins should not be left unconnected or floating. Output HIGH Level (IOH = 1mA) VOH VDBVDDn = 1.8V ±10% 0.75 VDBVDDn V VDBVDDn = 2.5V ±10% 0.65 VDBVDDn VDBVDDn = 3.3V ±10% 0.7 VDBVDDn Output LOW Level (IOL = 1mA) VOL VDBVDDn = 1.8V ±10% 0.25 VDBVDDn V VDBVDDn = 2.5V ±10% 0.3 VDBVDDn VDBVDDn = 3.3V ±10% 0.15 VDBVDDn Input capacitance 5 pF Input leakage -10 10 µA Pull-up / pull-down resistance (where applicable) 36 50 k Ω Digital Microphone Input / Output (DMICDATn and DMICCLKn) DMICDATn and DMICCLKn are each referenced to a selectable supply, VSUP, according to the INn_DMIC_SUP registers DMICDATn input HIGH Level VIH 0.65 V SUP V DMICDATn input LOW Level VIL 0.35 V SUP V DMICCLKn output HIGH Level VOH IOH = 1mA 0.8 V SUP V DMICCLKn output LOW Level VOL IOL = -1mA 0.2 V SUP V Input capacitance 25 pF Input leakage -1 1 µA General Purpose Input / Output (GPIOn) Clock output frequency GPIO pin configured as OPCLK or FLL output 50 MHz General Purpose Switch The GPSWA pin should be positive-biased with respect to GPSWB. The GPSWB pin voltage must not exceed GPSWA + 0.3V. Switch resistance RDS(ON) Switch closed, I=1mA 40 Ω Switch resistance RDS(OFF) Switch open 100 M Ω |
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