AD9546SLASHPCBZ datasheet(50/205 Pages) AD

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AD9546

Data Sheet

Rev. 0 | Page 50 of 205

CLOCK OUTPUTS

AD9546

PLLx

+1.8V

Qxy

Qxyy

ISOURCE MODE

OUTxyP

OUTxyN

50Ω

100Ω

50Ω

0.1µF

LVDS OR

LVPECL

RECEIVER

Figure 38. LVDS-Compatible Output Swing, AC-Coupled (375 mV (Differential) Across 100 Ω Termination Resistor for I = 15 mA)

The output drivers of the AD9546 are capable of either

sourcing or sinking current. Each pin of an output pin pair

(OUTxyP/OUTxyN) has an independent current source.

However, the source or sink function applies to both current

sources of an output pin pair (that is, either the source current

(ISOURCE) or sink current (ISINK) of both pin drivers). The current

source or sink current of the individual driver is either on or off,

depending on the output logic level of the associated Qxy or

Qxyy divider (0 = off, 1 = on).

The Qxy divider has both normal and inverted logic outputs,

which means when the Qxy divider is connected to both output

drivers (as in Figure 38, for example), one current source is on

while the other is off, allowing a differential output signal. See

the Distribution Clock Output Drivers section for configuring

the clock output drivers.

AD9546

PLLx

+1.8V

Qxy

Qxyy

ISOURCE MODE

OUTxyP

OUTxyN

50Ω

TO HCSL

RECEIVER

Figure 39. HCSL Output, Peak-to-Peak Voltage ≈ 750 mV per Section

(I = 15 mA)

AD9546

PLLx

Qxy

Qxyy

ISINK MODE

OUTxyP

OUTxyN

50Ω

1.2V, 1.5V

OR 1.8V

Figure 40. CML Output (I = 7.5 mA; I = 15 mA Options for 1.5 V or 1.8 V

Supply)

AD9546

PLLx

Qxy

Qxyy

ISINK MODE

OUTxyP

OUTxyN

50Ω

1.8V

10nF

Figure 41. LVDS-Compatible Output, 1.24 V Common Mode, T Network

(I = 7.5 mA; I = 15 mA with Extra 100 Ω Termination, RL)

AD9546

PLLx

Qxy

Qxyy

ISINK MODE

OUTxyP

OUTxyN

1.8V

63.4Ω

237Ω

63.4Ω

237Ω

Figure 42. LVDS-Compatible Output, 1.2 V Common-Mode, Thevenin Bias

Network (I = 7.5 mA; I = 15 mA with Extra 100 Ω Termination, RL)

AD9546

PLLx

Qxy

Qxyy

ISINK MODE

OUTxyP

OUTxyN

1.8V

56.2Ω

453Ω

56.2Ω

453Ω

Figure 43. 2.5 V LVPECL or Double Amplitude LVDS-Compatible Boost

Output, 1.5 V p-p, 1.24 V Common Mode (I = 15 mA)

AD9546

PLLx

Qxy

Qxyy

ISOURCE MODE

OUTxyP

OUTxyN

+1.8V

IN PHASE

OUTPUTS

Figure 44. Single-Divider, Single-Ended Mode Providing In Phase Outputs

(Current Source Mode)

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