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WM8281ECS/R Scheda tecnica(PDF) 156 Page - Cirrus Logic

Il numero della parte WM8281ECS/R
Spiegazioni elettronici  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Scheda tecnica(HTML) 156 Page - Cirrus Logic

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WM8281
156
Rev 4.0
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1280
(0500h)
AIF1
BCLK Ctrl
4:0
AIF1_BCLK_FRE
Q [4:0]
01100
AIF1BCLK Rate
00000 = Reserved
00001 = Reserved
00010 = 64kHz (58.8kHz)
00011 = 96kHz (88.2kHz)
00100 = 128kHz (117.6kHz)
00101 = 192kHz (176.4kHz)
00110 = 256kHz (235.2kHz)
00111 = 384kHz (352.8kHz)
01000 = 512kHz (470.4kHz)
01001 = 768kHz (705.6kHz)
01010 = 1.024MHz (940.8kHz)
01011 = 1.536MHz (1.4112MHz)
01100 = 2.048MHz (1.8816MHz)
01101 = 3.072MHz (2.8824MHz)
01110 = 4.096MHz (3.7632MHz)
01111 = 6.144MHz (5.6448MHz)
10000 = 8.192MHz (7.5264MHz)
10001 = 12.288MHz (11.2896MHz)
10010 = 24.576MHz (22.5792MHz)
The frequencies in brackets apply for
44.1kHz-related sample rates only.
If AIF1_RATE<1000, then AIF1 is
referenced to SYSCLK and the 44.1kHz-
related frequencies apply if
SAMPLE_RATE_n = 01XXX.
If AIF1_RATE>=1000, then AIF1 is
referenced to ASYNCCLK and the
44.1kHz-related frequencies apply if
ASYNC_SAMPLE_RATE_n = 01XXX.
The AIF1BCLK rate must be less than or
equal to SYSCLK/2, or ASYNCCLK/2, as
applicable.
R1285
(0505h)
AIF1 Tx
BCLK
Rate
12:0
AIF1TX_BCPF
[12:0]
0040h
AIF1TXLRCLK Rate
This register selects the number of BCLK
cycles per AIF1TXLRCLK frame.
AIF1TXLRCLK clock = AIF1BCLK /
AIF1TX_BCPF
Integer (LSB = 1), Valid from 8..8191
R1286
(0506h)
AIF1 Tx
BCLK
Rate
12:0
AIF1RX_BCPF
[12:0]
0040h
AIF1RXLRCLK Rate
This register selects the number of BCLK
cycles per AIF1RXLRCLK frame.
AIF1RXLRCLK clock = AIF1BCLK /
AIF1RX_BCPF
Integer (LSB = 1), Valid from 8..8191
Table 37 AIF1 BCLK and LRCLK Control



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