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WM8281ECS/R Scheda tecnica(PDF) 248 Page - Cirrus Logic |
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WM8281ECS/R Scheda tecnica(HTML) 248 Page - Cirrus Logic |
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248 / 392 page ![]() WM8281 248 Rev 4.0 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 9 DSP2_RAM_RD Y_EINT1 0 DSP2 RAM Ready Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. 8 DSP1_RAM_RD Y_EINT1 0 DSP1 RAM Ready Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. 7 DSP_IRQ8_EINT 1 0 DSP IRQ8 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 6 DSP_IRQ7_EINT 1 0 DSP IRQ7 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 5 DSP_IRQ6_EINT 1 0 DSP IRQ6 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 4 DSP_IRQ5_EINT 1 0 DSP IRQ5 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 3 DSP_IRQ4_EINT 1 0 DSP IRQ4 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 2 DSP_IRQ3_EINT 1 0 DSP IRQ3 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 1 DSP_IRQ2_EINT 1 0 DSP IRQ2 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 0 DSP_IRQ1_EINT 1 0 DSP IRQ1 Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. R3330 (0D02h) Interrupt Status 3 15 SPK_OVERHEA T_WARN_EINT1 0 Speaker Overheat Warning Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 14 SPK_OVERHEA T_EINT1 0 Speaker Overheat Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 13 HPDET_EINT1 0 Headphone Detect Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. 12 MICDET_EINT1 0 Microphone / Accessory Detect Interrupt (Detection event triggered) Note: Cleared when a ‘1’ is written. 11 WSEQ_DONE_EI NT1 0 Write Sequencer Done Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. 10 DRC2_SIG_DET _EINT1 0 DRC2 Signal Detect Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 9 DRC1_SIG_DET _EINT1 0 DRC1 Signal Detect Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. 8 ASRC2_LOCK_E INT1 0 ASRC2 Lock Interrupt (Rising and falling edge triggered) Note: Cleared when a ‘1’ is written. |
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